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ADS-943GC Datasheet(PDF) 5 Page - Murata Power Solutions Inc. |
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ADS-943GC Datasheet(HTML) 5 Page - Murata Power Solutions Inc. |
5 / 8 page ® ® ADS-943 5 THERMAL REQUIREMENTS All DATEL sampling A/D converters are fully characterized and specified over operating temperature (case) ranges of 0 to +70°C and –55 to +125°C. All room-temperature (TA = +25°C) production testing is performed without the use of heat sinks or forced-air cooling. Thermal impedance figures for each device are listed in their respective specification tables. These devices do not normally require heat sinks, however, standard precautionary design and layout procedures should be used to ensure devices do not overheat. The ground and power planes beneath the package, as well as all pcb signal runs to and from the device, should be as heavy as possible to help conduct heat away from the package. Electrically-insulating, thermally-conductive "pads" may be installed underneath the package. Devices should be soldered to boards rather than "socketed", and of course, minimal air flow over the surface can greatly help reduce the package temperature. In more severe ambient conditions, the package/junction temperature of a given device can be reduced dramatically (typically 35%) by using one of DATEL's HS Series heat sinks. See Ordering Information for the assigned part number. See page 1-183 of the DATEL Data Acquisition Components Catalog for more information on the HS Series. Request DATEL Application Note AN-8, "Heat Sinks for DIP Data Converters", or contact DATEL directly, for additional information. Figure 4. ADS-943 Timing Diagram OUTPUT DATA Data N Valid Scale is approximately 20ns per division. Sampling rate = 3MHz. EOC Data N-1 Valid Data N+1 Valid Invalid Data 283ns typ. 35ns typ. 130ns 1. The start convert positive pulse width must be between either 10 and 110nsec or 160 and 300nsec (when sampling at 3MHz) to ensure proper operation. For sampling rates lower than 3MHz, the start pulse can be wider than 300nsec, however a minimum pulse width low of 30nsec should be maintained. A 3MHz clock with a 20nsec positive pulse width is used for all production testing. 2. Note: 10ns max. INTERNAL S/H 10ns typ. Acquisition Time 125ns typ. 208ns typ. 215ns max. Hold Conversion Time 120ns min., 130ns typ., 140ns max. 50ns typ. 30ns typ. 125ns typ. START CONVERT N N+1 333nsec 20ns typ. |
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