SN54GTL1655, SN74GTL1655

16-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVERS

WITH LIVE INSERTION

SCBS696E – JULY 1997 – REVISED NOVEMBER 1999

10

POST OFFICE BOX 655303

live-insertion specifications over recommended operating free-air temperature range

PARAMETER

TEST CONDITIONS

SN54GTL1655

SN74GTL1655

UNIT

PARAMETER

TEST CONDITIONS

MIN

MAX

MIN

MAX

UNIT

ICC (BIAS VCC)

VCC = 0 to 3 V

V (B port) = 0 to 1.2 V,

5

5

mA

ICC (BIAS VCC)

VCC = 3 V to 3.6 V

()

,

VI (BIAS VCC) = 3 V to 3.6 V

10

10

µA

VO

B port

VCC = 0,

VI (BIAS VCC) = 3.3 V

1

1.2

1

1.2

V

VCC = 0,

V (B port) = 0.4 V,

VI (BIAS VCC) = 3 V to 3.6 V

–1

–1

IO

B port

VCC = 0 to 3.6 V,

OE = 3.3 V

100

100

µA

VCC = 0 to 1.5 V,

OE = 0 to 3.3 V

100

100

timing requirements over recommended ranges of supply voltage and operating free-air

SN54GTL1655

SN74GTL1655

UNIT

MIN

MAX

MIN

MAX

UNIT

fclock

Clock frequency

160

160

MHz

t

Pulse duration

LE high

3

3

ns

tw

Pulse duration

CLK high or low

3

3

ns

Data before CLK

↑

2.7

2.7

tsu

Setup time

Data before LE

↓

CLK high

2.8

2.8

ns

Data before LE

↓

CLK low

2.6

2.6

th

Hold time

Data after CLK

↑

0.4

0.4

ns

th

Hold time

Data after LE

↓

CLK high or low

0.9

0.9

ns

PRODUCT PREVIEW information concerns products in the formative or

design phase of development. Characteristic data and other

specifications are design goals. Texas Instruments reserves the right to

change or discontinue these products without notice.