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SN54HC125W Datasheet(PDF) 1 Page - Texas Instruments |
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SN54HC125W Datasheet(HTML) 1 Page - Texas Instruments |
1 / 6 page SN54HC125, SN74HC125 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS SCLS104B – MARCH 1984 – REVISED MAY 1997 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D High-Current 3-State Outputs Interface Directly With System Bus or Can Drive up to 15 LSTTL Loads D Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs description These quadruple bus buffer gates feature independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high. The SN54HC125 is characterized for operation over the full military temperature range of –55 °C to 125 °C. The SN74HC125 is characterized for operation from –40 °C to 85°C. FUNCTION TABLE (each buffer) INPUTS OUTPUT OE A Y L H H L LL H X Z logic symbol† EN 1 2 1A 1Y 3 4 5 2A 2Y 6 10 9 3A 3Y 8 13 12 4A 4Y 11 1OE 2OE 3OE 4OE † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, DB, J, N, and W packages. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1OE 1A 1Y 2OE 2A 2Y GND VCC 4OE 4A 4Y 3OE 3A 3Y SN54HC125 ...J OR W PACKAGE SN74HC125 . . . D, DB, OR N PACKAGE (TOP VIEW) 32 1 20 19 910 11 1213 4 5 6 7 8 18 17 16 15 14 4A NC 4Y NC 3OE 1Y NC 2OE NC 2A SN54HC125 . . . FK PACKAGE (TOP VIEW) NC – No internal connection Copyright © 1997, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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