SN54LV594A, SN74LV594A

8-BIT SHIFT REGISTERS

WITH OUTPUT REGISTERS

SCLS413B – APRIL 1998 – REVISED SEPTEMBER 1999

5

POST OFFICE BOX 655303

–0.5 V to 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–0.5 V to 7 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–20 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±35 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±70 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance,

73

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DB package

82

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

NS package

64

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PW package

108

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–65

°C to 150°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES:

1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. This value is limited to 7 V maximum.

3. The package thermal impedance is calculated in accordance with JESD 51.

recommended operating conditions (see Note 4)

SN54LV594A

SN74LV594A

UNIT

MIN

MAX

MIN

MAX

UNIT

VCC

Supply voltage

2

5.5

2

5.5

V

VCC = 2 V

1.5

1.5

VIH

High level input voltage

VCC = 2.3 V to 2.7 V

VCC × 0.7

VCC × 0.7

V

VIH

High-level input voltage

VCC = 3 V to 3.6 V

VCC × 0.7

VCC × 0.7

V

VCC = 4.5 V to 5.5 V

VCC × 0.7

VCC × 0.7

VCC = 2 V

0.5

0.5

VIL

Low level input voltage

VCC = 2.3 V to 2.7 V

VCC × 0.3

VCC × 0.3

V

VIL

Low-level input voltage

VCC = 3 V to 3.6 V

VCC × 0.3

VCC × 0.3

V

VCC = 4.5 V to 5.5 V

VCC × 0.3

VCC × 0.3

VI

Input voltage

0

5.5

0

5.5

V

VO

Output voltage

0

VCC

0

VCC

V

VCC = 2 V

–50

–50

µA

IOH

High level output current

VCC = 2.3 V to 2.7 V

–2

–2

IOH

High-level output current

VCC = 3 V to 3.6 V

–6

–6

mA

VCC = 4.5 V to 5.5 V

–12

–12

VCC = 2 V

50

50

µA

IOL

Low level output current

VCC = 2.3 V to 2.7 V

2

2

IOL

Low-level output current

VCC = 3 V to 3.6 V

6

6

mA

VCC = 4.5 V to 5.5 V

12

12

VCC = 2.3 V to 2.7 V

0

200

0

200

∆t/∆v

Input transition rise or fall rate

VCC = 3 V to 3.6 V

0

100

0

100

ns/V

VCC = 4.5 V to 5.5 V

0

20

0

20

TA

Operating free-air temperature

–55

125

–40

85

°C

NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

PRODUCT PREVIEW information concerns products in the formative or

design phase of development. Characteristic data and other

specifications are design goals. Texas Instruments reserves the right to

change or discontinue these products without notice.