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SN54LVTH541J Datasheet(PDF) 1 Page - Texas Instruments |
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SN54LVTH541J Datasheet(HTML) 1 Page - Texas Instruments |
1 / 13 page SN54LVTH541, SN74LVTH541 3.3V ABT OCTAL BUFFERS/DRIVERS WITH 3STATE OUTPUTS SCBS682G − MARCH 1997 − REVISED OCTOBER 2003 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC) D Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C D Support Unregulated Battery Operation Down to 2.7 V D Ioff and Power-Up 3-State Support Hot Insertion D Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors D Latch-Up Performance Exceeds 500 mA Per JESD 17 D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) description/ordering information These octal buffers/drivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. The ’LVTH541 devices are ideal for driving bus lines or buffer-memory address registers. These devices feature inputs and outputs on opposite sides of the package that facilitate printed circuit board layout. The 3-state control gate is a 2-input AND gate with active-low inputs so that, if either output-enable (OE1 or OE2) input is high, all outputs are in the high-impedance state. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING SOIC − DW Tube SN74LVTH541DW LVTH541 SOIC − DW Tape and reel SN74LVTH541DWR LVTH541 −40 °C to 85°C SOP − NS Tape and reel SN74LVTH541NSR LVTH541 −40 °C to 85°C SSOP − DB Tape and reel SN74LVTH541DBR LXH541 TSSOP − PW Tube SN74LVTH541PW LXH541 TSSOP − PW Tape and reel SN74LVTH541PWR LXH541 CDIP − J Tube SNJ54LVTH541J SNJ54LVTH541J −55 °C to 125°C CFP − W Tube SNJ54LVTH541W SNJ54LVTH541W −55 C to 125 C LCCC - FK Tube SNJ54LVTH541FK SNJ54LVTH541FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Copyright 2003, Texas Instruments Incorporated UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 OE1 A1 A2 A3 A4 A5 A6 A7 A8 GND VCC OE2 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 SN54LVTH541 ...J OR W PACKAGE SN74LVTH541 . . . DB, DW, NS, OR PW PACKAGE (TOP VIEW) 32 1 20 19 910 11 12 13 4 5 6 7 8 18 17 16 15 14 Y1 Y2 Y3 Y4 Y5 A3 A4 A5 A6 A7 SN54LVTH541 . . . FK PACKAGE (TOP VIEW) |
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