SN54LVTH540, SN74LVTH540

3.3-V ABT OCTAL BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCBS681E – MARCH 1997 – REVISED APRIL 1999

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POST OFFICE BOX 655303

Technology (ABT) Design for 3.3-V

Operation and Low Static-Power

Dissipation

Insertion

Need for External Pullup/Pulldown

Resistors

Down to 2.7 V

JESD 17

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

Small-Outline (DW), Shrink Small-Outline

(DB), and Thin Shrink Small-Outline (PW)

Packages, Ceramic Chip Carriers (FK),

Ceramic Flat (W) Package, and Ceramic (J)

DIPs

description

capability to provide a TTL interface to a 5-V system environment.

The ’LVTH540 devices are ideal for driving bus lines or buffer memory address registers. These devices feature

inputs and outputs on opposite sides of the package that facilitate printed circuit board layout.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2)

input is high, all outputs are in the high-impedance state.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

the minimum value of the resistor is determined by the current-sinking capability of the driver.

disables the outputs, preventing damaging current backflow through the devices when they are powered down.

The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,

which prevents driver conflict.

Copyright

© 1999, Texas Instruments Incorporated

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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OE1

A1

A2

A3

A4

A5

A6

A7

A8

GND

OE2

Y1

Y2

Y3

Y4

Y5

Y6

Y7

Y8

SN54LVTH540 ...J OR W PACKAGE

SN74LVTH540 . . . DB, DW, OR PW PACKAGE

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Y1

Y2

Y3

Y4

Y5

A3

A4

A5

A6

A7

SN54LVTH540 . . . FK PACKAGE

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