SN65LVDS109, SN65LVDS117

DUAL 4-PORT AND DUAL 8-PORT LVDS REPEATERS

SLLS369C – AUGUST 1999 – REVISED MARCH 2000

9

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

Y

Z

VOD

Input

CL = 10 pF

(2 Places)

100

Ω ± 1 %

1.4 V

1.2 V

1 V

tPLH

tPHL

100%

80%

20%

0%

Input

Output

0 V

tf

tr

VOD(H)

VOD(L)

VIB

VIA

A

B

NOTE A: All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, pulse repetition rate (PRR) = 50 Mpps,

pulsewidth = 10

±0.2 ns . CL includes instrumentation and fixture capacitance within 0,06 mm of the D.U.T.

Figure 4. Test Circuit, Timing, and Voltage Definitions for the Differential Output Signal

CL = 10 pF

(2 Places)

Y

Z

Inputs

49.9

Ω ± 1% (2 Places)

tPZH

tPHZ

tPZL

tPLZ

2 V

1.4 V

0.8 V

100%,

≅ 1.4 V

50%

0%, 1.2 V

0%,

≅ 1 V

100%, 1.2 V

50%

Input

VOY

or

VOZ

VOZ

or

VOY

VOY VOZ

1 V or 1.4 V

1.4 V or 1 V

EN

1.2 V

+

–

NOTE A: All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, pulse repetition rate (PRR) = 0.5 Mpps,

pulsewidth = 500

±10 ns . CL includes instrumentation and fixture capacitance within 0,06 mm of the D.U.T.

Figure 5. Enable and Disable Time Circuit and Definitions