SN65LBC184, SN75LBC184

DIFFERENTIAL TRANSCEIVER

WITH TRANSIENT VOLTAGE SUPPRESSION

SLLS236F − OCTOBER 1996 − REVISED APRIL 2005

5

POST OFFICE BOX 655303

DRIVER SECTION

electrical characteristics over recommended operating conditions (unless otherwise noted)

PARAMETER

ALTERNATE

SYMBOLS

TEST CONDITIONS

MIN

TYP†

MAX

UNIT

DE = RE = 5 V,

No Load

12

25

mA

ICC

Supply current

NA

DE = 0 V,

RE = 5 V,

No Load

175

300

µA

IIH

High-level input current (D, DE, RE)

NA

VI = 2.4 V

50

µA

IIL

Low-level input current (D, DE, RE)

NA

VI = 0.4 V

−50

µA

Short-circuit output current

VO = −7 V

− 250

−120

IOS

Short-circuit output current

(see Note 5)

NA

VO = VCC

250

mA

IOS

(see Note 5)

NA

VO = 12 V

250

mA

IOZ

High-impedance output current

NA

See Receiver II

mA

VO

Output voltage

Voa, Vob

IO = 0

0

VCC

V

VOC(PP)

Peak-to-peak change in common-

mode output voltage during state

transitions

NA

See Figures 5 and 6

0.8

V

VOC

Common-mode output voltage

|Vos|

See Figure 4

1

3

V

|

∆VOC(SS)|

Magnitude of change, common-

mode steady-state output voltage

|Vos − Vos|

See Figure 5

0.1

V

|VOD|

Magnitude of differential output

Vo

IO = 0

1.5

6

V

|VOD|

Magnitude of differential output

voltage |VA − VB|

Vo

RL = 54 Ω,

See Figure 4

1.5

V

∆|VOD|

Change in differential voltage mag-

nitude between logic states

||Vt| − |Vt||

RL = 54 Ω

0.1

V

† All typical values are measured with TA = 25°C and VCC = 5 V.

NOTE 5: This parameter is measured with only one output being driven at a time.

switching characteristics over recommended operating conditions (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

td(DH)

Differential output delay time, low-to-high-level output

1.3

µs

td(DL)

Differential-output delay time, high-to-low-level output

1.3

µs

tPLH

Propagation delay time, low-to-high-level output

RL = 54 Ω,

CL = 50 pF,

0.5

1.3

µs

tPHL

Propagation delay time, high-to-low-level output

RL = 54 Ω,

See Figure 5

CL = 50 pF,

0.5

1.3

µs

tsk(p)

Pulse skew (| td(DH) − td(DL) |)

See Figure 5

75

150

ns

tr

Rise time, single ended

0.25

1.2

µs

tf

Fall time, single ended

0.25

1.2

µs

tPZH

Output enable time to high level

RL = 110 Ω,

See Figure 2

3.5

µs

tPZL

Output enable time to low level

RL = 110 Ω,

See Figure 3

3.5

µs

tPHZ

Output disable time from high level

RL = 110 Ω,

See Figure 2

2

µs

tPLZ

Output disable time from low level

RL = 110 Ω,

See Figure 3

2

µs