155M~2.67Gbps Spring-latch SFP Transceiver

18/28dB Min. link budget, RoHS compliant

June 13, 2007

Fiberxon Proprietary and Confidential, Do Not Copy or Distribute

Page 8 of 12

Recommended Interface Circuit

Figure 3 shows the recommended interface circuit.

SFP Module

Laser

driver

Amplifier

EEPROM

MOD-DEF2

MOD-DEF1

MOD-DEF0

LOS

RD -

RD +

TD +

TD -

VccT

TX Fault

TX Disable

Z=50

Ω

Z=50

Ω

Z=50

Ω

Z=50

Ω

3×4.7K to 10K

Ω

10K

Ω

RGND

Host Board

SerDat Out +

SerDat Out -

SerDat In -

SerDat In +

Vcc (+3.3V)

SERDES

IC

Protocol

IC

2×4.7K to 10K

Ω

Vcc (+3.3V)

Figure 3, Recommended Interface Circuit

Pin Definitions

Figure 4 below shows the pin numbering of SFP electrical interface. The pin functions are described in Table 8

with some accompanying notes.

P in 10

Pin 1

P in 11

P in 20

B O T T O M VIEW

OF B OA R D

OF B OA R D

T O P VIEW

Figure 4, Pin View