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THS10064 Datasheet(PDF) 6 Page - Texas Instruments |
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THS10064 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 41 page THS10064 10-BIT 6 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTER SLAS255 – DECEMBER 1999 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended operating conditions, AVDD = 5 V, DVDD = BVDD = 3.3 V, fs = 6 MSPS, VREF = internal (unless otherwise noted) (continued) dc specifications PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Resolution 10 Bits Accuracy Integral nonlinearity, INL ±1 LSB Differential nonlinearity, DNL ±1 LSB Offset error After calibration in single-ended mode –15 15 mV Offset error After calibration in differential mode –5 5 mV Gain error 1% FSR Analog input Input capacitance 15 pF Input leakage current VAIN = VREFM to VREFP ±10 µA Internal voltage reference Accuracy, VREFP 3.33 3.5 3.67 V Accuracy, VREFM 1.42 1.5 1.58 V Temperature coefficient 50 PPM/ °C Reference noise 100 µV Accuracy, REFOUT 2.475 2.5 2.525 V Power supply IDDA Analog supply current AVDD =5 V, BVDD = DVDD = 3.3 V 36 40 mA IDDD Digital supply voltage AVDD = 5 V, BVDD = DVDD = 3.3 V 0.5 1 mA IDDB Buffer supply voltage AVDD = 5 V, BVDD = DVDD = 3.3 V 1.5 4 mA IDD_P Supply current in power-down mode AVDD = 5 V, BVDD = DVDD = 3.3 V 7 mA Power dissipation AVDD = 5 V, DVDD = BVDD = 3.3 V 186 216 mW Power dissipation in power down AVDD = 5 V, DVDD = BVDD = 3.3 V 30 mW |
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