TIR1000, TIR1000I

STANDALONE IrDA

™ ENCODER AND DECODER

SLLS228F – DECEMBER 1995 – REVISED JULY 1999

5

POST OFFICE BOX 655303

PRINCIPLES OF OPERATION

IrDA encoder function (continued)

It is possible for jitter or slight frequency differences to cause the next falling edge on IR_RXD to be missed for

one 16XCLK cycle. In that case, a 1-clock-wide pulse appears on U_RXD between consecutive zeroes. It is

important for the UART to strobe U_RXD in the middle of the bit time to avoid latching this 1-clock-wide pulse.

The TL16C550C UART already strobes incoming serial data at the proper time. Otherwise, note that data is

required to be framed by a leading zero and a trailing one. The falling edge of that first zero on U_RXD

synchronizes the read strobe. The strobe occurs on the eighth 16XCLK pulse after the U_RXD falling edge and

once every 16 cycles thereafter until the stop bit occurs.

1 2 3

4 5

6

7

8

10

12

14

16

1 2 3

4 5

6

7

8

10

12

14

16

IR_RXD

16XCLK

U_RXD

Figure 6. Timing Causing 1-clock-wide Pulse Between Consecutive Ones

16 Cycles

16 Cycles

16 Cycles

7 Cycles

16XCLK

IR_RXD

U_RXD

External Strobe

Figure 7. Recommended Strobing For Decoded Data