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TL061IP Datasheet(PDF) 4 Page - Texas Instruments |
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TL061IP Datasheet(HTML) 4 Page - Texas Instruments |
4 / 23 page TL061, TL061A, TL061B, TL061Y, TL062, TL062A TL062B, TL062Y, TL064, TL064A, TL064B, TL064Y LOW-POWER JFET-INPUT OPERATIONAL AMPLIFIERS SLOS078F – NOVEMBER 1978 – REVISED JANUARY 1999 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL061Y chip information This chip, when properly assembled, has characteristics similar to the TL061. Thermal compression or ultrasonic bonding can be used on the doped-aluminum bonding pads. The chips can be mounted with conductive epoxy or a gold-silicon preform. Bonding-Pad Assignments + – OUT IN+ IN– VCC+ (7) (3) (2) (6) (4) VCC– (1) (5) OFFSET N1 OFFSET N2 Chip Thickness: 15 Mils Typical Bonding Pads: 4 × 4 Mils Minimum TJ(max) = 150°C Tolerances Are ±10%. All Dimensions Are in Mils. Pin (4) is Internally Connected to Backside of Chip. 41 53 (6) (7) (8) (1) (2) (3) (4) (5) |
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