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TLE2081AMJG Datasheet(PDF) 6 Page - Texas Instruments |
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TLE2081AMJG Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 69 page  TLE208x, TLE208xA, TLE208xY EXCALIBUR HIGH-SPEED JFET-INPUT OPERATIONAL AMPLIFIERS SLOS182A – FEBRUARY 1997 – REVISED MARCH 2000 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLE2084Y chip information This chip, when properly assembled, displays characteristics similar to the TLE2084. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS CHIP THICKNESS: 15 TYPICAL BONDING PADS: 4 × 4 MINIMUM TJmax = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS. PIN (11) IS INTERNALLY CONNECTED TO BACKSIDE OF THE CHIP. + – 1OUT 1IN + 1IN – VCC+ (11) (6) (3) (2) (5) (1) (7) (4) – + 2OUT 2IN + 2IN – VCC – + – 3OUT 3IN + 3IN – (13) (10) (9) (12) (8) (14) – + 4OUT 4IN + 4IN – (2) (1) (14) (4) (5) (6) (7) (8) (9) (10) (11) (12) (13) 100 150 (3) |
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