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TLE2074ACN Datasheet(PDF) 5 Page - Texas Instruments |
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TLE2074ACN Datasheet(HTML) 5 Page - Texas Instruments |
5 / 77 page TLE207x, TLE207xA, TLE207xY EXCALIBUR LOW-NOISE HIGH-SPEED JFET-INPUT OPERATIONAL AMPLIFIERS SLOS181A – FEBRUARY 1997 – REVISED MARCH 2000 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLE2072Y chip information This chip, when properly assembled, displays characteristics similar to the TLE2072C. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS CHIP THICKNESS: 15 TYPICAL BONDING PADS: 4 × 4 MINIMUM TJmax = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS. PIN (4) IS INTERNALLY CONNECTED TO BACKSIDE OF THE CHIP. + – 1OUT 1IN + 1IN – VCC+ (4) (6) (3) (2) (5) (1) (7) (8) – + 2OUT 2IN + 2IN – VCC – 80 90 (1) (2) (3) (4) (5) (6) (7) (8) |
Similar Part No. - TLE2074ACN |
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