TLV5535

8-BIT, 35 MSPS, LOW-POWER ANALOG-TO-DIGITAL CONVERTER

SLAS221 – JUNE 1999

4

POST OFFICE BOX 655303

recommended operating conditions over operating free-temperature range

power supply

MIN

NOM

MAX

UNIT

AVDD – AVSS

Supply voltage

DVDD – DVSS

3

3.3

3.6

V

DRVDD – DRVSS

analog and reference inputs

MIN

NOM

MAX

UNIT

Reference input voltage (top), V(REFTI)

(NOM) – 0.2

2 + (AVDD – 3)

(NOM) + 0.2

V

Reference input voltage (bottom), V(REFBI)

0.8

1

1.2

V

Reference voltage differential, V(REFTI) – V(REFBI)

1 + (AVDD – 3)

V

Analog input voltage, V(AIN)

V(REFBI)

V(REFTI)

V

digital inputs

MIN

NOM

MAX

UNIT

High-level input voltage, VIH

2.0

DVDD

V

Low-level input voltage, VIL

DGND

0.2xDVDD

V

Clock period, tc

28.6

ns

Pulse duration, clock high, tw(CLKH)

13

ns

Pulse duration, clock low, tw(CLKL)

13

ns

voltage references (unless otherwise noted)

power supply

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

AVDD

AV

DV

3 3 V DRV

3 V

27

34

IDD

Operating supply current

DVDD

AVDD = DVDD = 3.3 V, DRVDD = 3 V,

CL =15 pFVI = 1 MHz –1-dB FS

1.5

2.6

mA

DRVDD

CL = 15 F, VI = 1 MHz, –1-dB FS

4

6

PD

Power dissipation

PWDN_REF = L

106

139

PD

Power dissipation

PWDN_REF = H

90

113

mW

PD(STBY)

Standby power

STBY = H,

CLK held high or low

11

15

digital logic inputs

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

IIH

High-level input current on CLK†

AVDD = DVDD = DRVDD = CLK = 3.6 V

10

µA

IIL

Low-level input current on digital inputs

(OE, STDBY, PWDN_REF, CLK)

AVDD = DVDD = DRVDD = 3.6 V,

Digital inputs at 0 V

10

µA

CI

Input capacitance

5

pF

† IIH leakage current on other digital inputs (OE, STDBY, PWDN_REF) is not measured since these inputs have an internal pull-down resistor of

4 K

Ω to DGND.