Electronic Components Datasheet Search |
|
TLV5625IDR Datasheet(PDF) 6 Page - Texas Instruments |
|
|
TLV5625IDR Datasheet(HTML) 6 Page - Texas Instruments |
6 / 15 page TLV5625 2.7-V TO 5.5-V LOW-POWER DUAL 8-BIT DIGITAL-TO-ANALOG CONVERTER WITH POWER DOWN SLAS233A – JULY 1999 – REVISED MARCH 2000 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 digital input timing requirements MIN NOM MAX UNIT tsu(CS–CK) Setup time, CS low before first negative SCLK edge 10 ns tsu(C16-CS) Setup time, 16th negative SCLK edge before CS rising edge 10 ns twH SCLK pulse width high 25 ns twL SCLK pulse width low 25 ns tsu(D) Setup time, data ready before SCLK falling edge 10 ns th(D) Hold time, data held valid after SCLK falling edge 5 ns timing requirements twL SCLK CS DIN D15 D14 D13 D12 D1 D0 X X 1 X 2 3 4 5 15 16 X twH tsu(D) th(D) tsu(CS-CK) tsu(C16-CS) Figure 1. Timing Diagram |
Similar Part No. - TLV5625IDR |
|
Similar Description - TLV5625IDR |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |