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TMS320C6203 Datasheet(PDF) 5 Page - Texas Instruments |
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TMS320C6203 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 86 page  TMS320C6202, TMS320C6202B, TMS320C6203, TMS320C6204 FIXED-POINT DIGITAL SIGNAL PROCESSORS SPRS104A – OCTOBER 1999 – REVISED MARCH 2000 5 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 description The TMS320C6202, TMS320C6202B, TMS320C6203, and TMS320C6204 devices are part of the TMS320C62x fixed-point DSP family in the TMS320C6000 platform. The ’C62x devices are based on the high-performance, advanced VelociTI very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for multichannel and multifunction applications. The TMS320C62x DSP offers cost-effective solutions to high-performance DSP programming challenges. The TMS320C6202B/’03 has a performance of up to 2400 million instructions per second (MIPS) at 300 MHz, while the TMS320C6202 has a performance of up to 2000 MIPS at 250 MHz, and the TMS320C6204 has a performance of up to 1600 MIPS at 200 MHz. The ’C6202/’02B/’03/’04 DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. These processors have 32 general-purpose registers of 32-bit word length and eight highly independent functional units. The eight functional units provide six arithmetic logic units (ALUs) for a high degree of parallelism and two 16-bit multipliers for a 32-bit result. The ’C6202/’02B/’03/’04 can produce two multiply-accumulates (MACs) per cycle. This gives a total of 600 million MACs per second (MMACS) for the ’C6202B/’03 device, a total of 500 MMACS for the ’C6202 device, and a total of 400 MMACS for the ’C6204 device. The ’C6202/’02B/’03/’04 DSP also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals. The TMS320C62x DSPs include an on-chip memory, with the ’C6203 device offering the most memory at 7 Mbits. For the ’C6202/’02B device, program memory consists of two blocks, with a 128K-byte block configured as memory-mapped program space, and the other 128K-byte block user-configurable as cache or memory-mapped program space. Data memory consists of two 64K-byte blocks of RAM. Similarly, the ’C6203 device program memory consists of two blocks, with a 256K-byte block configured as memory-mapped program space, and the other 128K-byte block user-configurable as cache or memory-mapped program space. Data memory consists of two 256K-byte blocks of RAM. For the ’C6204 device, program memory consists of a single 64K-byte block that is user-configured as cache or memory-mapped program space. Data memory consists of two 32K-byte blocks of RAM. The ’C6202/’02B/’03/’04 device has a powerful and diverse set of peripherals. The peripheral set includes multichannel buffered serial ports (McBSPs), general-purpose timers, a 32-bit expansion bus (XB) that offers ease of interface to synchronous or asynchronous industry-standard host bus protocols, and a glueless 32-bit external memory interface (EMIF) capable of interfacing to SDRAM or SBSRAM and asynchronous peripherals. The ’C62x devices have a complete set of development tools which includes: a new C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows ™ debugger interface for visibility into source code execution. Windows is a registered trademark of the Microsoft Corporation. |
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