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TMS320F241PG Datasheet(PDF) 2 Page - Texas Instruments |
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TMS320F241PG Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 116 page  TMS320F243, TMS320F241 DSP CONTROLLERS SPRS064B – DECEMBER 1997 – REVISED FEBRUARY 1999 2 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 Table of Contents Description 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Device Features 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PGE Package, 144-Pin QFP, ’F243 4 . . . . . . . . . . . . . . . . FN Package, 68-Pin PLCC, ’F241 5 . . . . . . . . . . . . . . . . . PG Package, 64-Pin QFP, ’F241 6 . . . . . . . . . . . . . . . . . . . Terminal Functions - ’F243 PGE Package 7 . . . . . . . . . . . Terminal Functions - ’F241 PG and FN Packages 14 . . . Functional Block Diagram 17 . . . . . . . . . . . . . . . . . . . . . . . Architectural Overview 18 . . . . . . . . . . . . . . . . . . . . . . . . . . System-Level Functions 18 . . . . . . . . . . . . . . . . . . . . . . . . . Device Memory Maps 18 . . . . . . . . . . . . . . . . . . . . . . . . . . Memory Maps 19 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Peripheral Memory Map 21 . . . . . . . . . . . . . . . . . . . . . . . . Software-Controlled Wait-State Generator 22 . . . . . . . . Digital I/O and Shared Pin Functions 23 . . . . . . . . . . . . . Digital I/O Control Registers 26 . . . . . . . . . . . . . . . . . . . . Device Reset and Interrupts 26 . . . . . . . . . . . . . . . . . . . . Clock Generation 34 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Low-Power Modes 34 . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Block Diagram of the ’24x DSP CPU 37 . . . . ’24x Legend for the Internal Hardware 38 . . . . . . . . . . . ’F243/’F241 DSP Core CPU 39 . . . . . . . . . . . . . . . . . . . . . Internal Memory 43 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Peripherals 45 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External Memory Interface (’F243 only) 45 . . . . . . . . . . Wait-State Generation (’F243 only) 46 . . . . . . . . . . . . . . Event-Manager (EV2) Module 47 . . . . . . . . . . . . . . . . . . Analog-to-Digital Converter (ADC) Module 50 . . . . . . . . A/D Overview 50 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Serial Peripheral Interface (SPI) Module 52 . . . . . . . . . . Serial Communications Interface (SCI) Module 54 . . . . Controller Area Network (CAN) Module 56 . . . . . . . . . . Watchdog (WD) Timer Module 60 . . . . . . . . . . . . . . . . . . Scan-Based Emulation 62 . . . . . . . . . . . . . . . . . . . . . . . . . . TMS320x24x Instruction Set 62 . . . . . . . . . . . . . . . . . . . . . Addressing Modes 62 . . . . . . . . . . . . . . . . . . . . . . . . . . . . Repeat Feature 63 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Instruction Set Summary 63 . . . . . . . . . . . . . . . . . . . . . . . Development Support 69 . . . . . . . . . . . . . . . . . . . . . . . . . . . Nomenclature 70 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Documentation Support 72 . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings 73 . . . . . . . . . . . . . . . . . . . . . . Recommended Operating Conditions 73 . . . . . . . . . . . . . Electrical Characteristics 73 . . . . . . . . . . . . . . . . . . . . . . . . Parameter Measurement Information 74 . . . . . . . . . . . . . . Signal Transition Levels 74 . . . . . . . . . . . . . . . . . . . . . . . . Timing Parameter Symbology 75 . . . . . . . . . . . . . . . . . . . General Notes on Timing Parameters 75 . . . . . . . . . . . . Clock Characteristics and Timings 76 . . . . . . . . . . . . . . . . Clock Options 76 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ext Reference Crystal/Clock w/PLL Circuit Enabled 77 Low-Power Mode Timings 78 . . . . . . . . . . . . . . . . . . . . . . RS Timings 79 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . XF, BIO, and MP/MC Timings 80 . . . . . . . . . . . . . . . . . . . Timing Event Manager Interface 81 . . . . . . . . . . . . . . . . . . PWM Timings 81 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Capture and QEP Timings 82 . . . . . . . . . . . . . . . . . . . . . . Interrupt Timings 83 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . General-Purpose Input/Output Timings 84 . . . . . . . . . . . SPI Master Mode Timing Parameters 85 . . . . . . . . . . . . . SPI Slave Mode Timing Parameters 89 . . . . . . . . . . . . . . . External Memory Interface Read Timings 93 . . . . . . . . . . External Memory Interface Write Timings 95 . . . . . . . . . . External Memory Interface Ready-on-Read 97 . . . . . . . . External Memory Interface Ready-on-Write 98 . . . . . . . . 10-Bit Dual Analog-to-Digital Converter (ADC) 99 . . . . . . ADC Operating Frequency 99 . . . . . . . . . . . . . . . . . . . . . ADC Input Pin Circuit 100 . . . . . . . . . . . . . . . . . . . . . . . . . Internal ADC Module Timings 101 . . . . . . . . . . . . . . . . . . Flash EEPROM 102 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Programming Operation 102 . . . . . . . . . . . . . . . . . . . . . . . Erase Operation 102 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Flash-Write Operation 102 . . . . . . . . . . . . . . . . . . . . . . . . Register File Compilation 103 . . . . . . . . . . . . . . . . . . . . . . . Mechanical Data 112 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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