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TMS77C82 Datasheet(PDF) 9 Page - Texas Instruments |
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TMS77C82 Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 43 page  TMS370Cx32 8-BIT MICROCONTROLLER SPNS015C – FEBRUARY 1990 – REVISED FEBRUARY 1997 9 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 peripheral file (PF) The TMS370Cx32 control registers contain all the registers necessary to operate the system and peripheral modules on the device. The instruction set includes some instructions that access the PF directly. These instructions designate the register by the number of the PF relative to 1000h, preceded by P0 for a hexadecimal designator or P for a decimal designator. For example, the system-control register 0 (SCCR0) is located at address 1010h; its peripheral file hexadecimal designator is P010, and its decimal designator is P16. Table 4 shows the TMS370Cx32 PF address map. Table 4. TMS370Cx32 Peripheral File Address Map ADDRESS RANGE PERIPHERAL FILE DESIGNATOR DESCRIPTION 1000h – 100Fh P000 – P00F Reserved 1010h – 101Fh P010 – P01F System and EPROM / EEPROM control registers 1020h – 102Fh P020 – P02F Digital I / O port control registers 1030h – 103Fh P030 – P03F Reserved 1040h – 104Fh P040 – P04F PACT registers 1050h – 106Fh P050 – P06F Reserved 1070h – 107Fh P070 – P07F Analog-to-digital converter 1 registers 1080h – 10FFh P080 – P0FF Reserved data EEPROM The TMS370Cx32 devices, containing 256 bytes of data EEPROM, have a memory that is mapped beginning at location 1F00h and continuing through location 1FFFh. Writing to the data EEPROM module is controlled by the data EEPROM control register (DEECTL) and the write-protection register (WPR). Programming algorithm examples are available in the TMS370 Family User’s Guide (literature number SPNU127) or the TMS370 Family Data Manual (literature number SPNS014B). The data EEPROM features include the following: D Programming: – Bit-, byte-, and block-write / erase modes – Internal charge pump circuitry. No external EEPROM programming voltage supply is needed. – Control register: Data EEPROM programming is controlled by the DEECTL located in the PF frame beginning at location P01A. See Table 5. – In-circuit programming capability. There is no need to remove the device to program it. D Write protection. Writes to the data EEPROM are disabled during the following conditions. – Reset. All programming of the data EEPROM module is halted. – Write protection active. There is one write-protect bit per 32-byte EEPROM block. – Low-power mode operation D Write protection can be overridden by applying 12 V to MC. Table 5. Data EEPROM and PROGRAM EPROM Control Registers Memory Map ADDRESS SYMBOL NAME P01A DEECTL Data EEPROM Control Register P01B — Reserved P01C EPCTLL Program EPROM Control Register – Low Array |
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