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ASM3P623S00BF-08-TR Datasheet(PDF) 1 Page - PulseCore Semiconductor

Part # ASM3P623S00BF-08-TR
Description  Timing-Safe??Peak EMI reduction IC
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Manufacturer  PULSECORE [PulseCore Semiconductor]
Direct Link  http://www.onsemi.com/
Logo PULSECORE - PulseCore Semiconductor

ASM3P623S00BF-08-TR Datasheet(HTML) 1 Page - PulseCore Semiconductor

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May 2007
ASM3P623S00B/C/J/E/F/K
rev 0.4
Notice: The information in this document is subject to change without notice.
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200, Campbell, CA 95008
• Tel: 408-879-9077 • Fax: 408-879-9018
www.pulsecoresemi.com
Timing-Safe™ Peak EMI reduction IC
General Features
Clock distribution with Timing-Safe™ Peak EMI
Reduction
Input frequency range: 20MHz - 50MHz
Zero input - output propagation delay
Low-skew outputs
Output-output skew less than 250pS
Device-device skew less than 700pS
Less than 200pS cycle-to-cycle jitter
Available in 16pin, 150mil SOIC, 4.4mm TSSOP
(ASM3P623S00/E/F/K), and in 8pin, 150 mil
SOIC, 4.4mm TSSOP Packages
(ASM3P623S00B/C/J)
3.3V operation
Industrial temperature range
Advanced CMOS technology
The First True Drop-in Solution
Functional Description
ASM3P623S00B/C/J/E/F/K is a versatile, 3.3V zero-delay
buffer designed to distribute high-speed Timing-Safe™
clocks with Peak EMI reduction. ASM3P623S00E/F/K
accepts one reference input and drives out eight low-skew
clocks. It is available in a 16pin package. The
ASM3P623S00B/C/J is the eight-pin version and accepts
one reference input and drives out one low-skew clock.
All parts have on-chip PLLs that lock to an input clock on
the CLKIN pin. The PLL feedback is on-chip and is
obtained from the CLKOUT pad, internal to the device.
Multiple ASM3P623S00E/F/K devices can accept the same
input clock and distribute it. In this case, the skew between
the outputs of the two devices is guaranteed to be less than
700pS.
All outputs have less than 200pS of cycle-to-cycle jitter.
The input and output propagation delay is guaranteed to be
less than 250pS, and the output-to-output skew is
guaranteed to be less than 250pS.
Refer
Spread Spectrum Control and Input-Output Skew
Table”
for deviations and Input-Output Skew for
ASM3P623S00B/C/J and the ASM3P623S00E/F/K devices
The ASM3P623S00B/C/J and the ASM3P623S00E/F/K are
available in two different packages, as shown in the
ordering information table.
Block Diagram
GND
Reference
Divider
Feedback
Divider
Modulation
Phase
Detector
Loop
Filter
VCO
Feedforward
Divider
PLL
VDD
CLKOUT
SSON
SS%
XIN/CLKIN
Crystal
Oscillator
XOUT


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