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I2040AF-08-TR Datasheet(PDF) 2 Page - PulseCore Semiconductor |
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I2040AF-08-TR Datasheet(HTML) 2 Page - PulseCore Semiconductor |
2 / 9 page November 2006 P2040A rev 1.3 LCD Panel EMI Reduction IC 2 of 9 Notice: The information in this document is subject to change without notice. MRA SSON# ModOUT 1 2 3 4 5 6 7 8 P2040A CLKIN SR1 VSS SR0 VDD Pin Configuration Pin Description Pin# Pin Name Type Description 1 CLKIN I External reference frequency input. Connect to externally generated reference signal. 2 MRA I Digital logic input used to select modulation rate. This pin has an internal pull-up resistor. 3 SR1 I Digital logic input used to select Spreading Range. This pin has an internal pull-up resistor. 4 VSS P Ground to entire chip. Connect to system ground. 5 SSON# I Digital logic input used to enable Spread Spectrum function (Active LOW). Spread Spectrum function enabled when LOW, disabled when HIGH. This pin has an internal pull-low resistor. 6 ModOUT O Spread spectrum clock output. 7 SR0 I Digital logic input used to select Spreading Range. This pin has an internal pull-up resistor. 8 VDD P Power supply for the entire chip (3.3V) Modulation Selection (Commercial) MRA SR1 SR0 Spreading Range Modulation Rate (KHz) 0 0 0 ± 1.125 (FIN /40) * 34.72KHz 0 0 1 ± 1.75 (FIN /40) * 34.72KHz 0 1 0 ± 0.75 (FIN /40) * 34.72KHz 0 1 1 ± 1.25 (FIN /40) * 34.72KHz 1 0 0 ± 1.25 (FIN /40) * 20.83KHz 1 0 1 ± 2.00 (FIN /40) * 20.83KHz 1 1 0 Reserved Reserved 1 1 1 Reserved Reserved |
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