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PCS2I9940L Datasheet(PDF) 8 Page - PulseCore Semiconductor |
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PCS2I9940L Datasheet(HTML) 8 Page - PulseCore Semiconductor |
8 / 13 page September 2006 PCS2I9940L rev 1.1 Low Voltage 1:18 Clock Distribution Chip 8 of 13 Notice: The information in this document is subject to change without notice. Power Consumption of the PCS2I9940L and Thermal Management The PCS2I9940L AC specification is guaranteed for the entire operating frequency range up to 250MHz. The PCS2I9940L power consumption and the associated long-term reliability may decrease the maximum frequency limit, depending on operating conditions such as clock frequency, supply voltage, output loading, ambient temperature, vertical convection and thermal conductivity of package and board. This section describes the impact of these parameters on the junction temperature and gives a guideline to estimate the PCS2I9940L die junction temperature and the associated device reliability. Table 11. Die junction temperature and MTBF Junction temperature (°C) MTBF (Years) 100 20.4 110 9.1 120 4.2 130 2.0 Increased power consumption will increase the die junction temperature and impact the device reliability (MTBF). According to the system-defined tolerable MTBF, the die junction temperature of the PCS2I9940L needs to be controlled and the thermal impedance of the board/package should be optimized. The power dissipated in the PCS2I9940L is represented in equation 1. Where ICCQ is the static current consumption of the PCS2I9940L, CPD is the power dissipation capacitance per output, (M)∑CL represents the external capacitive output load, N is the number of active outputs (N is always 12 in case of the PCS2I9940L). The PCS2I9940L supports driving transmission lines to maintain high signal integrity and tight timing parameters. Any transmission line will hide the lumped capacitive load at the end of the board trace, therefore, ∑CL is zero for controlled transmission line systems and can be eliminated from equation 1. Using parallel termination output termination results in equation 2 for power dissipation. In equation 2, P stands for the number of outputs with a parallel or thevenin termination, VOL, IOL, VOH and IOH are a function of the output termination technique and DCQ is the clock signal duty cycle. If transmission lines are used ∑CL is zero in equation 2 and can be eliminated. In general, the use of controlled transmission line techniques eliminates the impact of the lumped capacitive loads at the end lines and greatly reduces the power dissipation of the device. Equation 3 describes the die junction temperature TJ as a function of the power consumption. Where Rthja is the thermal impedance of the package (junction to ambient) and TA is the ambient temperature. According to Table 11, the junction temperature can be used to estimate the long-term device reliability. Further, combining equation 1 and equation 2 results in a maximum operating frequency for the PCS2I9940L in a series terminated transmission line system, equation 4. () () [] () 4 1 3 2 1 1 2 Equation V I R T T V N C f Equation R P T T Equation V I DC V V I DC C C N f V I V P Equation V C C N f V I P CC CCQ thja A JMAX CC PD CLOCKMAX thja TOT A J P OL OL Q OH CC OH Q M L PD CLOCK CC CCQ CC TOT CC M L PD CLOCK CC CCQ TOT ⋅ − − ⋅ ⋅ ⋅ = ⋅ + = ⋅ ⋅ − + − ⋅ + + ⋅ ⋅ ⋅ + ⋅ = ⋅ + ⋅ ⋅ ⋅ + = ∑ ∑ ∑ |
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