September 2006

PCS2I99447

rev 0.4

3.3V/2.5V 1:9 LVCMOS Clock Fanout Buffer

10 of 14

Notice: The information in this document is subject to change without notice.

boards, using 2S2P boards will result in a lower thermal

impedance than indicated below.

Table 10. Thermal package impedance of the

32LQFP

Convection,

LFPM

board), °C/W

board), °C/W

Still air

86

61

100 lfpm

76

56

200 lfpm

71

54

300 lfpm

68

53

400 lfpm

66

52

If the calculated maximum frequency is below 350 MHz, it

becomes the upper clock speed limit for the given

application conditions. The following eight derating charts

describe the safe frequency operation range for the

PCS2I99447. The charts were calculated for a maximum

tolerable die junction temperature of 110

°C (120°C),

corresponding to an estimated MTBF of 9.1 years

(4 years), a supply voltage of 3.3V and series terminated

transmission line or capacitive loading. Depending on a

given set of these operating conditions and the available

device convection a decision on the maximum operating

frequency can be made.

0

500

400

300

200

100

0

Convection Ifpm

50

100

150

200

250

300

350

Safe operation

3.3V, MTBF 9.1 years, driving series terminated

transmission lines, 2s2p board

0

500

400

300

200

100

0

Convection Ifpm

50

100

150

200

250

300

350

Safe operation

Figure 14. Maximum PCS2I99447

4pF load per line, 2s2p board

0

500

400

300

200

100

0

Convection Ifpm

50

100

150

200

250

300

350

Safe operation

Figure 16. Maximum PCS2I99447

load per line, 2s2p board

0

500

400

300

200

100

0

Convection Ifpm

50

100

150

200

250

300

350

Safe operation

= 3.3V, MTBF 4 years, driving series terminated

transmission lines, 2s2p board