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ASM5I2308AG-3-16-ST Datasheet(PDF) 6 Page - PulseCore Semiconductor

Part # ASM5I2308AG-3-16-ST
Description  3.3V Zero-Delay Buffer
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Manufacturer  PULSECORE [PulseCore Semiconductor]
Direct Link  http://www.onsemi.com/
Logo PULSECORE - PulseCore Semiconductor

ASM5I2308AG-3-16-ST Datasheet(HTML) 6 Page - PulseCore Semiconductor

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November 2006
ASM5P2308A
rev 1.5
3.3V Zero Delay Buffer
16 of 16
Notice: The information in this document is subject to change without notice.
Switching Characteristics for ASM5P2308A Commercial Temperature Devices
Parameter
Description
Test Conditions
Min
Typ
Max
Unit
1/t1
Output Frequency
30pF load, All devices
15
100
MHz
1/t1
Output Frequency
20pF load, -1H, -5H devices
8
15
133
MHz
t1/
Output Frequency
15pF load, -1, -2, -3, -4 devices
15
133
MHz
Duty Cycle
9= (t2 / t1) * 100
(-1, -2, -3, -4, -1H, -5H)
Measured at 1.4V, FOUT = <66.66MHz
30pF load
40.0
50.0
60.0
%
Duty Cycle
9= (t2 / t1) * 100
(-1, -2, -3, -4, -1H, -5H)
Measured at 1.4V, FOUT = <50MHz
15pF load
45.0
50.0
55.0
%
t3
Output Rise Time
9
(-1, -2, -3, -4)
Measured between 0.8V and 2.0V 30pF load
2.20
nS
t3
Output Rise Time
9
(-1, -2, -3, -4)
Measured between 0.8V and 2.0V 15pF load
1.50
nS
t3
Output Rise Time
9
(-1H, -5H)
Measured between 0.8V and 2.0V 30pF load
1.50
nS
t4
Output Fall Time
9
(-1, -2, -3, -4)
Measured between 2.0V and 0.8V 30pF load
2.20
nS
t4
Output Fall Time
9
(-1, -2, -3, -4)
Measured between 0.8V and 2.0V 15pF load
1.50
nS
t4
Output Fall Time
9
(-1H, -5H)
Measured between 2.0V and 0.8V 30pF load
1.25
nS
Output-to-output skew on same
bank (-1, -2, -3, -4)
9
All outputs equally loaded
200
pS
Output-to-output skew
(-1H, -5H)
All outputs equally loaded
200
Output bank A -to- output
Bank B skew (-1, -4, -5H)
All outputs equally loaded
200
t5
Output bank A -to- output
Bank B skew (-2, -3)
All outputs equally loaded
400
t6
Delay, REF Rising Edge to FBK
Rising Edge
9
Measured at VDD /2
0
±250
pS
t7
Device-to-Device Skew
9
Measured at VDD/2 on the FBK pins of the device
0
700
pS
Measured at 66.67MHz, loaded outputs, 15pF load
200
pS
Measured at 66.67MHz, loaded outputs, 30pF load
200
tJ
Cycle-to-cycle jitter
9
(-1, -1H, -4, -5H)
Measured at 133.3MHz, loaded outputs, 15pF
load
100
Measured at 66.67MHz, loaded outputs, 30pF load
400
pS
tJ
Cycle-to-cycle jitter
9
(-2, -3)
Measured at 66.67MHz, loaded outputs, 15pF
load
400
tLOCK
PLL Lock Time
9
Stable power supply, valid clock presented on REF
and FBK pins
1.0
mS
Note:
9. Parameter is guaranteed by design and characterization. Not 100% tested in production.


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