BD166

2

Motorola Bipolar Power Transistor Device Data

25

20

15

10

5

0

0

20

40

60

80

100

120

140

160

Figure 1. PD – TC Derating Curve

TC, CASE TEMPERATURE (°C)

10

Figure 2. Safe Operating Area (see Note 1)

VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)

5.0

3.0

2.0

1.0

0.5

0.1

5.0

7.0

10

20

30

100

50

0.3

0.2

PULSE CURVES APPLY BELOW

RATED VCEO

TJ = 150°C

dc

5.0 ms

100

µs

70

SECOND BREAKDOWN

LIMITED

BONDING WIRE LIMITED

THERMAL LIMITATION @ TC = 25°C

1.0 ms

Figure 3. Collector Saturation Region

IB, BASE CURRENT (mA)

1.2

0

1

1

0.8

0.6

0.4

0.2

5

10

50

100

500

1000

IC = 0.1 A

0.25 A

1 A

0.5 A

10

0.01

Figure 4. Current Gain

IC, COLLECTOR CURRENT (A)

0.1

0.05

0.1

0.5

1

1

TJ = + 150°C

+ 25

°C

– 25

°C

VCE = 2 V

Figure 5. “On” Voltage

IC, COLLECTOR CURRENT (mA)

1

0.5

0.1

0.05

0.01

10

50

100

500

1000

VBE at VCE = 2 V

VBE(sat) at IC/IB = 10

TJ = 25°C

VCE(sat) at IC/IB = 10

Note 1:

There are two limitations on the power handling ability of a

transistor; average junction temperature and second break-

down. Safe operating area curves indicate IC – VCE limits of

the transistor that must be observed for reliable operation;

i.e., the transistor must not be subjected to greater dissipa-

tion than the curves indicate.

The data of Figure 2 is based on TJ(pk) = 150_C; TC is

variable depending on conditions. Second breakdown pulse

limits are valid for duty cycles to 10% provided TJ(pk)

v 150_C. At high case temperatures, thermal limitations will

reduce the power that can be handled to values less than the

limitations imposed by second breakdown.