ADS62P48IRGCR datasheet(9/76 Pages) TI

Part #	ADS62P48IRGCR

Description	Dual Channel 14-/12-Bit, 250-/210-MSPS ADC With DDR LVDS and Parallel CMOS Outputs

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Manufacturer	TI [Texas Instruments]

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DIGITAL CHARACTERISTICS — ADS62Px9/x8

Dn_Dn+1_P

DAnP/DBnP

Dn_Dn+1_M

DAnM/DBnM

GND

V

OCM

Logic0

V

= –350mV

ODL

(1)

Logic1

V

=350mV

ODH

(1)

T0334-02

ADS62P49 / ADS62P29

ADS62P48 / ADS62P28

www.ti.com............................................................................................................................................................. SLAS635A – APRIL 2009 – REVISED JUNE 2009

The DC specifications refer to the condition where the digital outputs are not switching, but are permanently at a valid logic

level 0 or 1. AVDD = 3.3V, DRVDD = 1.8V

ADS62P49/ADS62P48/

ADS62P29/ADS62P28

PARAMETER

TEST CONDITIONS

UNIT

MIN

TYP

MAX

DIGITAL INPUTS – CTRL1, CTRL2, CTRL3, RESET, SCLK, SDATA, SEN(1)

High-level input voltage

1.3

V

All digital inputs support 1.8V and 3.3V

CMOS logic levels.

Low-level input voltage

0.4

V

SDATA, SCLK(2)

16

High-level input current

VHIGH = 3.3 V

µA

SEN(3)

10

SDATA, SCLK

0

Low-level input current

VLOW = 0 V

µA

SEN

–20

Input capacitance

4

pF

DIGITAL OUTPUTS – CMOS INTERFACE (DA0-DA13, DB0-DB13, CLKOUT, SDOUT)

High-level output voltage

DRVDD

IOH = 1mA

DRVDD

V

–0.1

Low-level output voltage

IOL = 1mA

0

0.1

V

Output capacitance (internal to device)

2

pF

DIGITAL OUTPUTS – LVDS INTERFACE

VODH

High-level output differential voltage

With external 100

Ω termination.

275

350

425

mV

VODL

Low-level output differential voltage

With external 100

Ω termination.

–425

–350

–275

mV

VOCM

Output common-mode voltage

1

1.15

1.4

V

Capacitance inside the device from

Output Capacitance

2

pF

each output to ground

(1)

SCLK, SDATA, SEN function as digital input pins in serial configuration mode.

(2)

SDATA, SCLK have internal 200 k

Ω pull-down resistor

(3)

SEN has internal 100 k

Ω pull-up resistor to AVDD. Since the pull-up is weak, SEN can also be driven by 1.8V or 3.3V CMOS buffers.

(1)

With external 100-

Ω termination

Figure 3. LVDS Output Voltage Levels

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Product Folder Link(s): ADS62P49 / ADS62P29 ADS62P48 / ADS62P28

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ADS62P48IRGCR Datasheet(PDF) 9 Page - Texas Instruments

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