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SN75DP139RGZT Datasheet(PDF) 9 Page - Texas Instruments

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Part # SN75DP139RGZT
Description  DisplayPort to TMDS Translator
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

SN75DP139RGZT Datasheet(HTML) 9 Page - Texas Instruments

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ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATINGS
SN75DP139
www.ti.com...................................................................................................................................................................................................... SLLS977 – APRIL 2009
ORDERING INFORMATION(1)
PART NUMBER
PART MARKING
PACKAGE
SN75DP139RGZR
DP139
48-pin QFN Reel (large)
SN75DP139RGZT
DP139
48-pin QFN Reel (small)
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE
UNIT
Supply voltage range(2)
VCC
–0.3 to 3.6
V
Main Link Input (IN_Dx) differential voltage
1.56
V
TMDS Outputs (OUT_Dx)
–0.3 to 4
V
HPD I/O (HPD_SOURCE, HPD_SINK)
–0.3 to 5.5
V
Voltage range
Auxiliary I/O (SCL_SOURCE, SDA_SOURCE, SCL_SINK,
–0.3 to 5.5
V
SDA_SINK)
Control I/O (OE_N, DDC_EN, SRC, OVS, HPDINV)
–0.3 to 5.5
V
Human body model(3)
±10000
V
Electrostatic discharge
Charged-device model(4)
±1500
V
Machine model(5)
±200
V
Continuous power dissipation
See Dissipation Rating Table
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any conditions beyond those indicated under recommended operating conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
All voltage values, except differential voltages, are with respect to network ground terminal.
(3)
Tested in accordance with JEDEC Standard 22, Test Method A114-B
(4)
Tested in accordance with JEDEC Standard 22, Test Method C101-A
(5)
Tested in accordance with JEDEC Standard 22, Test Method A115-A
PACKAGE
PCB JEDEC
TA ≤ 25°C
DERATING FACTOR(1)
TA = 85°C
STANDARD
ABOVE TA = 25°C
POWER RATING
Low-K
1426.8 mW
14.28 mW/°C
570 mW
48-pin QFN (RGZ)
High-K
3125 mW
31.25 mW/°C
1250 mW
(1)
This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.
Copyright © 2009, Texas Instruments Incorporated
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