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TAS5615PHD Datasheet(PDF) 3 Page - Texas Instruments |
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TAS5615PHD Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 30 page  MODE SELECTION PINS PACKAGE HEAT DISSIPATION RATINGS (1) TAS5615 www.ti.com ...................................................................................................................................................................................................... SLAS595 – JUNE 2009 MODE PINS OUTPUT ANALOG DESCRIPTION INPUT CONFIGURATION M3 M2 M1 0 0 0 Differential 2 × BTL AD mode 0 0 1 — — Reserved 0 1 0 Differential 2 × BTL BD mode Differential 0 1 1 1 × BTL +2 × SE AD mode, BTL Differential Single Ended 1 0 0 Single Ended 4 × SE AD mode INPUT_C(1) INPUT_D(1) 1 0 1 Differential 1 × PBTL 0 0 AD mode 1 0 BD mode 1 1 0 Reserved 1 1 1 (1) INPUT_C and D are used to select between a subset of AD and BD mode operations in PBTL mode (1=VREG and 0=AGND). PARAMETER TAS5615PHD TAS5615DKD RθJC (°C/W) – 2 BTL or 4 SE channels 3.63 2.52 RθJC (°C/W) – 1 BTL or 2 SE channel(s) 5.95 3.22 RθJC (°C/W) – 1 SE channel 9.9 6.9 Pad Area (2) 49 mm2 80 mm2 (1) JC is junction-to-case, CH is case-to-heat sink (2) RθH is an important consideration. Assume a 2-mil thickness of typical thermal grease between the pad area and the heat sink and both channels active. The RθCH with this condition is 1.22°C/W for the PHD package and and 1.02°C/W for the DKD package. ORDERING INFORMATION(1) TA PACKAGE DESCRIPTION 0°C–70°C TAS5615PHD(2) 64 pin HTQFP 0°C–70°C TAS5615DKD 44 pin PSOP3 (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. (2) Product Preview Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s) :TAS5615 |
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