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THS6214IRHFT Datasheet(PDF) 4 Page - Texas Instruments |
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THS6214IRHFT Datasheet(HTML) 4 Page - Texas Instruments |
4 / 41 page ELECTRICAL CHARACTERISTICS: VS = ±12V THS6214 SBOS431 – MAY 2009 ....................................................................................................................................................................................................... www.ti.com At TA = +25°C, GDIFF = +10V/V with RL = 100Ω differential load, RADJ = 0Ω, active impedance circuit configuration, and full bias, unless otherwise noted. Each port is independently tested. Boldface values are 100% tested at +25°C. THS6214IRHF, IPWP TEST PARAMETER CONDITIONS MIN TYP MAX UNIT LEVEL(1) AC PERFORMANCE Small-signal bandwidth, –3dB GDIFF = +5V/V , RF = 1.5kΩ, VO = 2VPP 160 MHz C GDIFF = +10V/V , RF = 1.5kΩ, VO = 2VPP 120 150 MHz B Over –40°C to +85°C temperature range 100 MHz B 0.1dB bandwidth flatness GDIFF = +10V/V , RF = 1.24kΩ 114 MHz C Large-signal bandwidth GDIFF = +10V/V , RF = 1.24kΩ, VO = 20VPP 120 MHz C Slew rate (10% to 90% level) GDIFF = +10V/V, VO = 20V step, differential 3200 3800 V/ µs B TA = –40°C to +85°C 3000 V/ µs B Rise and fall time GDIFF = +10V/V, VO = 2VPP 5 ns C Harmonic distortion GDIFF = +10V/V, VO = 2VPP, RL = 100Ω differential C 2nd harmonic Full bias, f = 1MHz –100 -95 dBc B TA = –40°C to +85°C -90 dBc B Low bias, f = 1Mhz –96 dBc C 3rd harmonic Full bias, f = 1MHz –89 -85 dBc B TA = –40°C to +85°C -80 dBc B Low bias, f = 1MHz –85 dBc C 2nd harmonic Full bias, f = 10MHz –75 -70 dBc B TA = –40°C to +85°C -65 dBc B Low bias, f = 10MHz –72 dBc C 3rd harmonic Full bias, f = 10MHz –73 -65 dBc B TA = –40°C to +85°C -53 dBc B Low bias, f = 10MHz –58 dBc C Differential input voltage noise f = 1MHz, input-referred 2.7 3.2 nV/ √Hz B TA = –40°C to +85°C 3.5 nV/ √Hz B Differential noninverting current f = 1MHz 1.2 1.4 pA/ √Hz B noise TA = –40°C to +85°C 1.6 pA/ √Hz B Differential inverting current noise f = 1MHz 17 20 pA/ √Hz B TA = –40°C to +85°C 24 pA/ √Hz B DC PERFORMANCE Open-loop transimpedance gain RL = 100Ω 330 700 k Ω A 300 k Ω B Input offset voltage ±15 ±50 mV A TA = –40°C to +85°C ±60 mV B Input offset voltage drift TA = –40°C to +85°C ±155 µV/°C B Input offset voltage matching Channels 1 to 2 and 3 to 4 only ±0.5 ±5 mV A TA = –40°C to +85°C ±7 mV B Noninverting input bias current ±1 ±3.5 µA A TA = –40°C to +85°C ±5.5 µA B Noninverting input bias current drift TA = –40°C to +85°C ±30 nA/°C B Inverting input bias current ±8 ±45 µA A TA = –40°C to +85°C ±55 µA B Inverting input bias current drift TA = –40°C to +85°C ±154 nA/°C B Inverting input bias current matching ±8 ±30 µA A TA = –40°C to +85°C ±40 µA B (1) Test levels: (A) 100% tested at +25°C. Over-temperature limits set by characterization and simulation. (B) Limits set by characterization and simulation. (C) Typical value only for information. 4 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): THS6214 |
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