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TLV320AIC3007 Datasheet(PDF) 2 Page - Texas Instruments |
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TLV320AIC3007 Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 98 page  DESCRIPTION (CONTINUED) TLV320AIC3007 SLOS619 – APRIL 2009 ..................................................................................................................................................................................................... www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. The high-power output drivers are capable of driving a variety of load configurations, including up to three channels of single-ended 16- Ω headphones using ac-coupling capacitors, or stereo 16-Ω headphones in a capacitorless output configuration. The mono class-D output is capable of differentially driving an 8- Ω speaker. The stereo audio DAC supports sampling rates from 8 kHz to 96 kHz and includes programmable digital filtering in the DAC path for 3D, bass, treble, midrange effects, speaker equalization, and de-emphasis for 32-kHz, 44.1-kHz, and 48-kHz rates. The stereo audio ADC supports sampling rates from 8 kHz to 96 kHz and is preceded by programmable gain amplifiers or AGC that can provide up to 59.5 dB analog gain for low-level microphone inputs. The TLV320AIC3007 provides an extremely high range of programmability for both attack (8-1,408 ms) and for decay (0.05-22.4 seconds). This extended AGC range allows the AGC to be tuned for many types of applications. For battery saving applications where neither analog nor digital signal processing are required, the device can be put in a special analog signal passthru mode. This mode significantly reduces power consumption, as most of the device is powered down during this pass through operation. The serial control bus supports I2C protocol, while the serial audio data bus is programmable for I2S, left/right-justified, DSP, or TDM modes. A highly programmable PLL is included for flexible clock generation and support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, with special attention paid to the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks. The TLV320AIC3007 operates from an analog supply of 2.7 V–3.6 V, a digital core supply of 1.525 V–1.95 V, a digital I/O supply of 1.1 V–3.6 V, and a speaker amplifier supply of 2.7V–5.5V. The device is available in the 5 × 5-mm, 40-pin QFN package. 2 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :TLV320AIC3007 |
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