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TMS320C28345 Datasheet(PDF) 4 Page - Texas Instruments |
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TMS320C28345 Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 153 page  TMS320C28346, TMS320C28345, TMS320C28344 TMS320C28343, TMS320C28342, TMS320C28341 Delfino Microcontrollers SPRS516 – MARCH 2009 www.ti.com List of Figures 2-1 C2834x 179-Ball ZHH MicroStar BGA™ Upper Left Quadrant (Bottom VIew) ........................................... 13 2-2 C2834x 179-Ball ZHH MicroStar BGA™ Upper Right Quadrant (Bottom View) .......................................... 14 2-3 C2834x 179-Ball ZHH MicroStar BGA™ Lower Left Quadrant (Bottom View) ........................................... 15 2-4 C2834x 179-Ball ZHH MicroStar BGA™ Lower Right Quadrant (Bottom View) .......................................... 16 2-5 C2834x 256-Ball ZFE Plastic BGA Upper Left Quadrant (Bottom View) .................................................. 17 2-6 C2834x 256-Ball ZFE Plastic BGA Upper Right Quadrant (Bottom View) ................................................ 18 2-7 C2834x 256-Ball ZFE Plastic BGA Lower Left Quadrant (Bottom View) .................................................. 19 2-8 C2834x 256-Ball ZFE Plastic BGA Lower Right Quadrant (Bottom View) ................................................ 20 3-1 Functional Block Diagram ....................................................................................................... 32 3-2 C28346/C28345 Memory Map .................................................................................................. 34 3-3 C28344/C28343 Memory Map .................................................................................................. 35 3-4 C28342, C28341 Memory Map .................................................................................................. 36 3-5 External and PIE Interrupt Sources ............................................................................................. 47 3-6 External Interrupts ................................................................................................................ 48 3-7 Multiplexing of Interrupts Using the PIE Block ................................................................................ 49 3-8 Clock and Reset Domains ....................................................................................................... 51 3-9 OSC and PLL Block Diagram ................................................................................................... 52 3-10 Using a 3.3-V External Oscillator ............................................................................................... 53 3-11 Using a 1.8-V External Oscillator ............................................................................................... 53 3-12 Using the Internal Oscillator ..................................................................................................... 53 3-13 Watchdog Module ................................................................................................................. 55 4-1 DMA Functional Block Diagram ................................................................................................. 58 4-2 CPU-Timers ........................................................................................................................ 59 4-3 CPU-Timer Interrupt Signals and Output Signal .............................................................................. 59 4-4 Generation of SOC Pulses to the External ADC Module ................................................................... 61 4-5 ePWM Submodules Showing Critical Internal Signal Interconnections .................................................... 64 4-6 eCAP Functional Block Diagram ................................................................................................ 65 4-7 eQEP Functional Block Diagram ................................................................................................ 67 4-8 External ADC Interface ........................................................................................................... 69 4-9 McBSP Module ................................................................................................................... 71 4-10 eCAN Block Diagram and Interface Circuit .................................................................................... 74 4-11 eCAN-A Memory Map ............................................................................................................ 75 4-12 eCAN-B Memory Map ............................................................................................................ 76 4-13 Serial Communications Interface (SCI) Module Block Diagram ............................................................ 80 4-14 SPI Module Block Diagram (Slave Mode) ..................................................................................... 83 4-15 I2C Peripheral Module Interfaces ............................................................................................... 84 4-16 GPIO MUX Block Diagram ....................................................................................................... 86 4-17 Qualification Using Sampling Window .......................................................................................... 91 4-18 External Interface Block Diagram ............................................................................................... 92 List of Figures 4 Submit Documentation Feedback |
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