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ISL6265AHRTZ-T Datasheet(PDF) 11 Page - Intersil Corporation |
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ISL6265AHRTZ-T Datasheet(HTML) 11 Page - Intersil Corporation |
11 / 23 page 11 FN6884.0 May 11, 2009 an error amplifier that allows the controller to maintain a 0.5% voltage regulation accuracy throughout the VID range from 0.75V to 1.55V. Voltage regulation accuracy is slightly wider, ±5mV, over the VID range from 0.7375V to 0.5V. The hysteresis window voltage is relative to the error amplifier output such that load current transients result in increased switching frequency, which gives the R3 regulator a faster response than conventional fixed frequency PWM controllers. In uniplane configurations, transient load current is inherently shared between active phases due to the use of a common hysteretic window voltage. Individual average phase currents are monitored and controlled to equally share current among the active phases. Modulator The ISL6265A modulator features Intersil’s R3 technology, a hybrid of fixed frequency PWM control and variable frequency hysteretic control (see Figure 5). Intersil’s R3 technology can simultaneously affect the PWM switching frequency and PWM duty cycle in response to input voltage and output load transients. The R3 modulator synthesizes an AC signal VR, which is an analog representation of the output inductor ripple current. The duty-cycle of VR is the result of charge and discharge current through a ripple capacitor CR. The current through CR is provided by a transconductance amplifier gm that measures the VIN and VO voltages. The positive slope of VR can be written as determined by Equation 1: The negative slope of VR can be written as determined by Equation 2: Where gm is the gain of the transconductance amplifier. A window voltage VW is referenced with respect to the error amplifier output voltage VCOMP, creating an envelope into which the ripple voltage VR is compared. The amplitude of VW is set by a resistor connected across the FSET and GND pins. The VR, VCOMP, and VW signals feed into a window comparator in which VCOMP is the lower threshold voltage and VW is the higher threshold voltage. Figure 6 shows PWM pulses being generated as VR traverses the VW and VCOMP thresholds. The PWM switching frequency is proportional to the slew rates of the positive and negative slopes of VR; it is inversely proportional to the voltage between VW and VCOMP. Initialization Once sufficient bias is applied to the VCC pin, internal logic checks the status of critical pins to determine the controller operation profile prior to ENABLE. These pins include RTN1 which determines single vs two-phase operation and OFS/VFIXEN for enabling/disabling the SVI interface and core voltage droop. Depending on the configuration set by these pins, the controller then checks the state of the SVC and SVD pins to determine the soft-start target output voltage level.. Power-On Reset The ISL6265A requires a +5V input supply tied to VCC and PVCC to exceed a rising power-on reset (POR) threshold before the controller has sufficient bias to guarantee proper operation. Once this threshold is reached or exceeded, the ISL6265A has enough bias to begin checking RTN1, OFS/VFIXEN, ENABLE, and SVI inputs. Hysteresis between the rising the falling thresholds assure the ISL6265A will not inadvertently turn-off unless the bias voltage drops substantially (see “Electrical Specifications” on page 8). Core Configuration The ISL6265A determines the core channel requirements of the CPU based on the state of the RTN1 pin prior to ENABLE. If RTN1 is low prior to ENABLE, both VDD0 and VDD1 core planes are required. The core controllers operate as independent single-phase regulators. RTN1 is connected to the CPU Core1 negative sense point. For single core CPU designs (uniplane), RTN1 is tied to a +1.8V or greater supply. Prior to ENABLE, RTN1 is detected as HIGH and the ISL6265A drives the core controllers as a two-phase multi-phase regulator. Dual purpose motherboard designs should include resistor options to V RPOS g m () V IN V OUT – () ⋅ = (EQ. 1) V RNEG g m VOUT ⋅ = (EQ. 2) FIGURE 5. MODULATOR CIRCUITRY ISL6265A VW VR PWM R S Q VCOMP FSET + gmVIN + gmVO + + - + CR PWM FREQUENCY CONTROL - + VIN TO PWM CONTROL VO FIGURE 6. MODULATOR WAVEFORMS DURING LOAD TRANSIENT RIPPLE CAPACITOR VOLTAGE CR WINDOW VOLTAGE VW ERROR AMPLIFIER VOLTAGE VCOMP PWM ISL6265A |
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Similar Description - ISL6265AHRTZ-T |
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