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UCC1858 Datasheet(PDF) 4 Page - Texas Instruments |
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UCC1858 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 12 page 4 UCC1858 UCC2858 UCC3858 PIN DESCRIPTIONS CA–: (Current Amplifier Inverting Input) This input and the non-inverting input MOUT remain functional down to GND. CAO: (Current Amplifier Ouput) Output of a wide band- width amplifier that senses line current and commands the pulse width modulator (PWM) to force the correct cur- rent. This output can swing close to GND, allowing the PWM to force zero duty cycle when necessary. CRMS: (RMS Measurement Capacitor) A capacitor con- nected between CRMS and GND enables averaging of the AC line voltage over a half cycle. IAC current is inter- nally mirrored to provide charging current for CRMS. CT: (Oscillator Timing Capacitor) A capacitor from CT to GND will set the free-running PWM oscillator frequency according to: f RC TT = • 0 814 . FBL: (Frequency Foldback Level Select) Selects the level of the voltage error amplifier output at which frequency foldback begins. A chip shutdown can be attained by bringing the foldback level pin to below 0.5V. FBM: (Minimum Frequency Reference) A resistor be- tween this pin and VREF is used to set the minimum fre- quency during foldback mode. Once the value of RT and CT are determined, use R Cf R FBM TMIN T = • − 0 857 . to find the value of RFBM which will set the minimum foldback frequency to fMIN. This pin also incorporates a foldback override which enables the part to return quickly to normal operating mode when the load comes back up. To override foldback mode, force this pin below 1.5V with an open collector. GND: (Ground) All voltages measured with respect to ground. VDD and VREF should be bypassed directly to GND with a 0.1 µF or larger ceramic capacitor. The timing capacitor discharge current also returns to this pin, so the lead from CT to GND should be as short and direct as possible. IAC: (Input AC Current) This input to the analog multiplier is a current. The multiplier is tailored for very low distor- tion from this current input (IIAC) to MOUT. Requires some bypassing to GND for noise filtering (<470pF). MOUT: (Multiplier Output) The output of the analog multi- plier and the non-inverting input of the current amplifier are connected together at MOUT. As the multiplier output is a current, this is a high impedance input so the ampli- fier can be configured as a differential amplifier to reject ground noise. The voltage at this pin is also used to im- plement peak current limiting. OUT: (Gate Drive Output) The output of the PWM is a to- tem pole MOSFET gate driver. A series gate resistor of at least 5 Ω is recommended to prevent interaction be- tween the gate impedance and the output driver that might cause the gate drive to overshoot excessively. RT: (Oscillator Timing Resistor) A resistor from RT to GND is used to program oscillator discharge current. SYNC: (Oscillator Synchronization Input) Allows the PFC to be synchronized to a trailing edge modulator in the DC-DC stage. A synchronization pulse can be generated from the positive output edge of the downstream regula- tor and applied to this pin. The internal clock is reset (charged up) on the rising edge of the SYNC input. VA–: (Voltage Amplifier Inverting Input) This pin is nor- mally connected to the boost converter output through a divider network. It also is an input to the overvoltage comparator where by the output is terminated if this pin’s voltage exceeds 3.15V. VAO: (Voltage Amplifier Output) Output of the transconductance amplifier that regulates output voltage. The voltage amplifier output is internally limited to ap- proximately 6V for power limiting. It is also used to deter- mine the frequency foldback mode. Compensation network is connected from this pin to GND. ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for TA = 0°C to 70°C for the UCC3858, –40°C to +85°C for the UCC2858, and –55°C to +150°C for the UCC1858, VVDD = 12V, RT = 24k, CT = 330pF, RFBM = 96k, IIAC = 100µA, TA = TJ. PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Gate Driver Pull Up Resistance IOUT = 100mA 7 Ω Pull Down Resistance IOUT = –100mA 3.5 Ω Output Rise Time CLOAD = 1nF, RS = 10Ω 25 ns Output Fall Time CLOAD = 1nF, RS = 10Ω 20 ns Note1: M OUT current with contributions form CA+ and peak limit level shift subtracted out. |
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Similar Description - UCC1858 |
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