UCC2880-4/-5/-6

UCC3880-4/-5/-6

PIN DESCRIPTIONS (cont.)

bit is set high by floating it, or connecting it to a 5V

source. Each control pin is pulled up to approximately 5V

by an internal 70

µA current source.

ENBL (Chip Enable Pin): This input is used to disable

the GATE and PWRGOOD outputs. Grounding this pin

causes the GATE output to be held low; floating the pin or

pulling it up to 5V ensures normal operation. ENBL is

pulled up to 5V internally.

GATE (PWM Output, MOSFET Driver): This output pro-

vides a 2

Ω totem pole driver. Use a series resistor of at

least 5

Ω between this pin and the gate of the external

MOSFET to prevent excessive overshoot.

GND (Signal Ground): All voltages are measured with

respect to GND. Bypass capacitors on the VCC and

VREF pins should be connected directly to the ground

plane near the GND pin.

IS– (Current Sense Amplifier Inverting Input): This pin

is the inverting input to the current sense amplifier and is

connected to the low side of the average current sense

resistor.

IS+ (Current Sense Amplifier Noninverting Input):

This pin is the noninverting input to the current sense am-

plifier and is connected to the high side of the average

current sense resistor.

ISOUT (Current Sense Amplifier Output): This pin is

the output of the current sense amplifier. The voltage on

is the fixed gain of the current sense amplifier, equal to

20, I is the current through the sense resistor, and

tor.

PGND (Power Ground): This pin provides a dedicated

ground for the output gate driver. The GND and PGND

pins should be connected externally using a short printed

circuit board trace close to the IC. Decouple VIN to

PGND with a low ESR capacitor

≥ 0.10µF.

PWRGOOD (Undervoltage/Lower Overvoltage Out-

put): This pin is an open drain output which is driven low

to reset the microprocessor when VSENSE rises above

or falls below its nominal value by 7.5%. The on resis-

tance of the open drain switch will be no higher than

470

Ω. The OV and UV comparators’ hysteresis is fixed at

20mV independent of the COMMAND voltage.

VIN (Positive Supply Voltage): This pin supplies power

to the chip. Connect VIN to a stable voltage source of at

least 10.8V. The GATE and PWRGOOD outputs will be

held low until VCC exceeds the upper undervoltage lock-

out threshold. This pin should be bypassed directly to the

GND pin.

VFB (Voltage Amplifier Inverting Input): This input is

connected to COMP through a feedback network and to

the power supply output through a resistor or a divider

network.

VREF (Voltage Reference Output): This pin provides an

accurate 5V reference and is internally short circuit cur-

rent limited. VREF powers the D/A converter and also

provides a threshold voltage for the UVLO comparator.

For best reference stability, bypass VREF directly to GND

with a low ESR, low ESL capacitor of at least 0.01

µF.

VSENSE (Output Voltage Sensing Input): This pin is

connected to the system output voltage through a low

pass filter. When the voltage on VSENSE rises above or

falls below the COMMAND voltage by 7.5%, the

PWRGOOD output is driven low to reset the microproc-

essor. When the voltage on VSENSE rises above the

COMMAND voltage by 15%, the OVP comparator pulls

the current amplifier output voltage below the oscillator

valley voltage to force zero duty cycle at the GATE out-

put. This pin is also used by the foldback current limiting

circuitry.

Current Limit

=

1.4V

cuit current limit at 16A using the UCC3880-5

=

1.4V

16A

• 20 =

4.4m

Ω

A lower resistance value may be needed if the AC ripple

current in the inductor is more than 20% of the full load

current.

Related Publications

U-156 and U-157 are Unitrode Application Notes describ-

ing the operation of the UC3886 and the UC3886/

UC3910 together in a Pentium® Pro application.

APPLICATION INFORMATION

5