UCC2880-4/-5/-6

UCC3880-4/-5/-6

PIN DESCRIPTIONS (cont.)

CAM (Current Amplifier Inverting Input): The average

load current feedback from ISOUT is applied through a

resistor to this pin. The current loop compensation net-

work is also connected to this pin (see CAO below).

CAO (Current Amplifier Output): The current loop com-

pensation network is connected between this pin and

CAM. The voltage on this pin is the input to the PWM

comparator and regulates the output voltage of the sys-

tem. The GATE output is disabled (held low) unless the

voltage on this pin exceeds 1V, allowing the PWM to

force zero duty cycle when necessary. The PWM forces

maximum duty cycle when the voltage on CAO exceeds

the oscillator peak voltage (3V). A 3.2V clamp circuit pre-

vents the CAO voltage from rising excessively past the

oscillator peak voltage for excellent transient response.

COMMAND (Digital-to-Analog Converter Output Volt-

age): This pin is the output of the 4-bit digital-to-analog

converter (DAC) and the noninverting input of the voltage

amplifier. The voltage on this pin sets the switching regu-

lator output voltage. Setting all input control codes low

produces 3.5V at COMMAND; setting all codes high pro-

duces 2.0V at COMMAND. The DAC LSB step size (i.e.

resolution) is 100mV (See Table 1). The COMMAND

source impedance is typically 1.2k

Ω and must therefore

drive only high impedance inputs if accuracy is to be

maintained. Bypass COMMAND with a 0.01

µF, low ESR,

low ESL capacitor for best circuit noise immunity.

COMP (Voltage Amplifier Output): The system voltage

compensation network is applied between COMP and

VFB.

D0 - D3 (DAC Digital Input Control Codes): These are

the DAC digital input control codes, with D0 representing

the least significant bit (LSB) and D3, the most significant

bit (MSB). A bit is set low by being connected to GND. A

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

Oscillator

Frequency (-4)

85

100

115

kHz

Frequency (-5)

200

kHz

Frequency (-6)

400

kHz

Frequency Change With Voltage

10.8V < VIN < 15V

1

%

Output Section

Maximum Duty Cycle

90

95

99

%

Output Low Voltage

0.20

V

Output High Voltage

11.8

V

Rise Time

20

80

ns

Fall Time

15

80

ns

Output Impedance

2

Ω

2

Ω

Foldback Current Limit

Clamp Level

Measured at Voltage EA Output;

4.4

V

3.7

V

Note 1: This percentage is measured with respect to the ideal COMMAND voltage programmed by the D0 - D3 pins.

Decimal

Code

D3

D2

D1

D0

COMMAND

Voltage

15

11

11

2.0

14

11

10

2.1

13

11

01

2.2

12

11

00

2.3

11

10

11

2.4

10

10

10

2.5

910

01

2.6

810

00

2.7

701

11

2.8

601

10

2.9

501

01

3.0

401

00

3.1

300

11

3.2

200

10

3.3

100

01

3.4

000

00

3.5

Table 1. Programming the COMMAND Voltage

4