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UCC381DP-ADJG4 Datasheet(PDF) 7 Page - Texas Instruments |
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UCC381DP-ADJG4 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 10 page 7 UCC281-3/-5/-ADJ UCC381-3/-5/-ADJ UNITRODE CORPORATION 7 CONTINENTAL BLVD. • MERRIMACK, NH 03054 TEL. (603) 424-2410 • FAX (603) 424-3460 Thermal Design The Packing Information section of the data book con- tains reference material for the thermal ratings of various packages. The section also includes an excellent article Thermal Characteristics of Surface Mount Packages, that is the basis of the following discussion. Thermal design for the UCC381 includes two modes of operation, normal and pulsed mode. In normal operation, the linear regulator and heat sink must dissipate power equal to the maximum forward voltage drop multiplied by the maximum load current. Assuming a constant current load, the expected heat rise at the regulator’s junction can be calculated as follows: () T P jc ca C RISE DISS =• + ° θθ (5) Where theta is thermal resistance and PDISS is the power dissipated. The thermal resistance of both the SOIC-8 DP package (junction to case) is 22 degrees Celsius per Watt. In order to prevent the regulator from going into thermal shutdown, the case to ambient theta must keep the junction temperature below 150C. If the LDO is mounted on a 5 square inch pad of 1 ounce copper, for example, the thermal resistance from junction to ambient becomes 40-70 degrees Celsius per Watt. If a lower ther- mal resistance is required by the application, the device heat sinking would need to be improved. When the UCC381 regulator is in pulsed mode, due to an overload or short circuit in the application, the maxi- mum average power dissipation is calculated as follows: () () P VV I T T Watts PULSE avg IN OUT CL ON ON = −• • • 33 (6) As seen in equation 6, the average power during a fault is reduced dramatically by the duty cycle, allowing the heat sink to be sized for normal operation. Although the peak power in the regulator during the TON period can be significant, the thermal mass of the package will gener- ally keep the junction temperature from rising unless the TON period is increased to tens of milliseconds. Ripple Rejection Even though the UCC381 linear regulators are not opti- mized for fast transient applications (Refer to UC182 “Fast LDO Linear Regulator”), they do offer significant power supply rejection at lower frequencies. Fig 5. de- picts ripple rejection performance in a typical application. The performance can be improved with additional filter- ing. APPLICATION INFORMATION (cont.) 0 10 20 30 40 50 60 70 80 90 1.0E+02 1.0E+03 1.0E+04 1.0E+05 FREQUENCY 10uF, IOUT = 100mA 1uF, IOUT = 100mA 1uF, IOUT =1A 10uF, IOUT =1A Figure 5. Ripple rejection vs. frequency. |
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