UCC29421, UCC29422, UCC39421, UCC39422

MULTIMODE HIGHFREQUENCY PWM CONTROLLER

SLUS246C − OCTOBER 1999 − REVISED FEBRUARY 2005

11

POST OFFICE BOX 655303

APPLICATION INFORMATION

choosing a topology and optimal synchronous rectifier (continued)

Note that the higher the frequency of operation, the more critical the MOSFET gate charge becomes for

efficiency, particularly at light loads. However, high load currents demand lower Rds(on), which tends to

increase gate charge. These two parameters should be balanced. At lower frequencies, the gate charge

becomes less important, at 1 MHz or more, it is critical.

Table 1. SELECTING TOPOLOGY BASED ON INPUT AND OUTPUT VOLTAGE REQUIREMENTS

Cell Type

Nunber of Cells

VIN Range

VOUT

Topology

2

1.8 V to 3.0 V

3.0 < V < 8.0

Boost

Alkaline or NiCd, NiMH

2.5 < V < 3.9

Flyback or SEPIC

Alkaline or NiCd, NiMH

3

2.7 V to 4.5 V

4.5 < V < 8.0

Boost

3

2.7 V to 4.5 V

V > 8.0

Non−synchronous boost

2.5 < V < 3.6

Flyback or SEPIC

Li-Ion

1

2.5 V to 4.2 V

4.2 < V < 8.0

Boost

Li-Ion

1

2.5 V to 4.2 V

V > 8.0

Non−synchronous boost

boost topology

The boost topology is simple and efficient, and should be used whenever the desired output voltage is greater

than the maximum input voltage.

boost using two n-channel MOSFETs

A boost converter using two N-channel MOSFETs is shown in Figure 4. This configuration is optimal for output

voltages below 4 V, where the output voltage may not be high enough to provide optimal gate drive for a

P-channel MOSFET. Note that in this case, a charge pump is required to provide proper gate drive levels. This

is easily accomplished by adding an external diode and a capacitor, as shown. The diode connects from the

output voltage to the CP pin. It should be an ultrafast or a Schottky diode. A 0.1-

µF ceramic capacitor is

pin to ground. It should be at least 1

µF. A high-speed active rectifier inside the UCC39421 charges the pump

capacitor from the CP pin. The charge pump voltage is:

V

PUMP ^

2

V

OUT

(4)

For a block diagram of the charge pump logic, refer to Figure 12.

Note: A charge pump should not be used at output voltages over 4.0 V to avoid pump voltages exceeding 8 V.

For other applications, where the charge pump is not required, the CP pin should be grounded and the pin