622Mbps, 3.3V Clock-Recovery and

Data-Retiming IC with Limiting Amplifier

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9

The comparator is configured with an active-high LOP

output. An on-chip, 6k

Ω pull-up resistor is provided to

reduce the external part count.

Setting the Loop Filter

The MAX3676 is designed for both regenerator and

receiver applications. Its fully integrated PLL is a classic

second-order feedback system, with a loop bandwidth

adjusted to set the loop damping. Figures 2 and 3 show

the open-loop and closed-loop transfer functions. The

ed by:

to guarantee a maximum jitter peaking of less than

0.1dB.

The MAX3676 is optimally designed to acquire lock and

long strings of consecutive zeros and ones. Measured

results show that the MAX3676 can tolerate 1200 con-

number of tolerated consecutive identical zeros and

type X7R or better.

Lock Detect

The MAX3676’s LOL monitor indicates when the PLL is

locked. Under normal operation, the loop is locked and

the LOL output signal is high. When the MAX3676 loses

lock, a fast negative-edge transition occurs on LOL.

until the loop reacquires lock (Figure 4).

M

=

0log 1+

P

2

f

f

Z

L

⎛

⎝⎜

⎞

⎠⎟

f

=

1

2

Z

π()

100

1k

10k

100k

μF

μF

1M

10M

f (Hz)

100

1k

10k

100k

μF

μF

0

-3

H(J2

πf) (dB)

1M

10M

f (kHz)

Figure 2. Open-Loop Transfer Function

Figure 3. Closed-Loop Transfer Function