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MAX16020 Datasheet(PDF) 9 Page - Maxim Integrated Products

Part # MAX16020
Description  Low-Power 關P Supervisory Circuits with Battery-Backup Circuit and Chip-Enable Gating
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX16020 Datasheet(HTML) 9 Page - Maxim Integrated Products

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Low-Power µP Supervisory Circuits with
Battery-Backup Circuit and Chip-Enable Gating
_______________________________________________________________________________________
9
Pin Description—MAX16016
PIN
NAME
FUNCTION
1VCC
Supply Voltage Input. Bypass VCC to GND with a 0.1µF capacitor.
2
BATT
Backup Battery Input. If VCC falls below its reset threshold, and if VBATT > VCC, OUT connects to
BATT. If VCC rises above 1.01 x VBATT, OUT connects to VCC. Bypass BATT to GND with a 0.1µF
capacitor.
3
MR
Active-Low Manual Reset Input. RESET asserts when MR is pulled low. RESET remains low for the
duration of reset timeout period after MR transitions from low to high. Connect MR to OUT or leave
unconnected if not used. MR is internally connected to OUT through a 30k
Ω pullup resistor.
4
PFI
Power-Fail Comparator Input. Connect PFI to a resistive divider to set the desired PFI threshold. The
PFI input is referenced to an internal VPFT threshold. A VPFT-HYS internal hysteresis provides noise
immunity. The power-fail comparator is powered from OUT.
5
WDI
Watchdog Timer Input. If WDI remains high or low for longer than the watchdog timeout period (tWD),
the internal watchdog timer runs out and a reset pulse is triggered for the reset timeout period. The
internal watchdog clears when reset asserts or whenever WDI sees a rising or falling edge. To
disable the watchdog feature, leave WDI unconnected or three-state the driver connected to WDI.
6
BATTON
Active-High Battery-On Output. BATTON goes high when in battery-backup mode.
7
PFO
Active-Low Power-Fail Comparator Output. PFO goes low when VPFI falls below the internal VPFT
threshold and goes high when VPFI rises above VPFT + VPFT-HYS hysteresis.
8
GND
Ground
9
RESET
Active-Low Reset Output. RESET asserts when VCC falls below the reset threshold or MR is pulled low.
RESET remains low for the duration of the reset timeout period after VCC rises above the reset threshold
and MR goes high. RESET also asserts low when the internal watchdog timer runs out.
10
OUT
Switched Output. OUT is connected to VCC when the reset output is not asserted or when VCC is
greater than VBATT. OUT connects to BATT when RESET is asserted and VBATT is greater than VCC.
Bypass OUT to GND with a 0.1µF (min) capacitor.


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