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MAX16064ETX+ Datasheet(PDF) 4 Page - Maxim Integrated Products

Part # MAX16064ETX+
Description  ±0.3% Accurate, Quad, Power-Supply Controller with Active-Voltage Output Control and PMBus Interface
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX16064ETX+ Datasheet(HTML) 4 Page - Maxim Integrated Products

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±0.3% Accurate, Quad, Power-Supply Controller with
Active-Voltage Output Control and PMBus Interface
4
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VAVDD = VDVDD = 3.0V to 3.6V, VEN = 2V, VRS_+ - VRS_- = 2V, VRS_- = 0V, TA = TJ = -40°C to +85°C, unless otherwise specified.
Typical values are at VAVDD = VDVDD = 3.3V, TA = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ADDRESS PINS (A1/SCLE, A2/SDAE, A3/CONTROL)
Input Logic-Low Voltage
0.3
V
Input Logic-Low Hysteresis
50
mV
Input Logic-High Voltage
VAVDD
- 0.4
V
Input Logic-High Hysteresis
50
mV
Input Leakage Current
-12
+12
µA
SMBus INTERFACE (SCL, SDA) (Note 3)
SCL, SDA Input Low Voltage
VIL
Input voltage falling
0.8
V
SCL, SDA Input High Voltage
VIH
Input voltage rising
2.1
V
SCL, SDA Input Leakage Current
(Per Pin)
Device powered or unpowered, VAVDD = 0V
to 3.6V, VSCL = VSDA = 0 or VAVDD
-1
+1
µA
Input Capacitance
CIN
10
pF
SCL, SDA Output Low Voltage
VOL
ISINK = 3mA
0.4
V
SMBUS TIMING
Serial-Clock Frequency
fSCL
10
100
kHz
Bus Free Time Between STOP
and START Condition
tBUF
4.7
µs
START Condition Setup Time
tSU:STA
4.7
µs
START Condition Hold Time
tHD:STA
4.0
µs
STOP Condition Setup Time
tSU:STO
4.0
µs
Clock Low Period
tLOW
4.7
µs
Clock High Period
tHIGH
4.0
µs
Data Setup Time
tSU:DAT
250
ns
Output Fall Time
tOF
CBUS = 10pF to 400pF
300
ns
Data Hold Time
tHD:DAT
From 50% SCL falling to SDA change
300
ns
Pulse Width of Spike Suppressed
tSP
30
ns
SMBus Timeout
tTIMEOUT
SMBCLK time low for reset
25
55
ms
OTHER TIMING PARAMETERS
PMBus Command Response
Time
tPMB_RSP
300
µs
Fault Response Time
tFAULT_RSP
5ms
Recovery Time After Device
Reset
tRST_WAIT
15
µs
Note 2: 100% production tested at TA = +25°C. Limits over temperature are guaranteed by design.
Note 3: The MAX16064 supports SCL clock stretching.


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