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ADP3634ARDZ Datasheet(PDF) 8 Page - Analog Devices |
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ADP3634ARDZ Datasheet(HTML) 8 Page - Analog Devices |
8 / 16 page ADP3623/ADP3624/ADP3625/ADP3633/ADP3634/ADP3635 Rev. A | Page 8 of 16 SD 1 INA 2 PGND 3 INB 4 OTW 8 OUTA 7 VDD 6 OUTB 5 ADP3625/ ADP3635 TOP VIEW (Not to Scale) NOTES 1. THE EXPOSED PAD OF THE PACKAGE IS NOT DIRECTLY CONNECTED TO ANY PIN OF THE PACKAGE, BUT IT IS ELECTRICALLY AND THERMALLY CONNECTED TO THE DIE SUBSTRATE, WHICH IS THE GROUND OF THE DEVICE. Figure 9. ADP3625/ADP3635 Pin Configuration Table 5. ADP3625/ADP3635 Pin Function Descriptions Pin No. Mnemonic Description 1 SD Output Shutdown. When high, this pin disables normal operation, forcing OUTA and OUTB low. 2 INA Inverting Input Pin for Channel A Gate Driver. 3 PGND Ground. This pin should be closely connected to the source of the power MOSFET. 4 INB Input Pin for Channel B Gate Driver. 5 OUTB Output Pin for Channel B Gate Driver. 6 VDD Power Supply Voltage. Bypass this pin to PGND with a ~1 µF to 5 µF ceramic capacitor. 7 OUTA Output Pin for Channel A Gate Driver. 8 OTW Overtemperature Warning Flag. Open drain, active low. |
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