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FDD6782A Datasheet(PDF) 2 Page - Fairchild Semiconductor |
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FDD6782A Datasheet(HTML) 2 Page - Fairchild Semiconductor |
2 / 6 page www.fairchildsemi.com 2 ©2009 Fairchild Semiconductor Corporation FDD6782A Rev.C Electrical Characteristics T J = 25 °C unless otherwise noted Off Characteristics On Characteristics Dynamic Characteristics Switching Characteristics Drain-Source Diode Characteristics Symbol Parameter Test Conditions Min Typ Max Units BVDSS Drain to Source Breakdown Voltage ID = 250 µA, VGS = 0 V 25 V ∆BV DSS ∆T J Breakdown Voltage Temperature Coefficient ID = 250 µA, referenced to 25 °C 16 mV/°C IDSS Zero Gate Voltage Drain Current VDS = 20 V, VGS = 0 V 1 µA IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V ±100 nA VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 µA 1.0 1.8 3.0 V ∆V GS(th) ∆T J Gate to Source Threshold Voltage Temperature Coefficient ID = 250 µA, referenced to 25 °C -6 mV/°C rDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 14.9 A 8.3 10.5 m Ω VGS = 4.5 V, ID = 11.0 A 17.8 24.0 VGS = 10 V, ID = 14.9 A, TJ = 150 °C 12.7 16.1 gFS Forward Transconductance VDS = 5 V, ID = 14.9 A 60 S Ciss Input Capacitance VDS = 13 V, VGS = 0 V, f = 1MHz 800 1065 pF Coss Output Capacitance 162 220 pF Crss Reverse Transfer Capacitance 151 230 pF Rg Gate Resistance f = 1MHz 1.0 Ω td(on) Turn-On Delay Time VDD = 13 V, ID = 14.9 A, VGS = 10 V, RGEN = 6 Ω 714 ns tr Rise Time 310 ns td(off) Turn-Off Delay Time 15 27 ns tf Fall Time 24 ns Qg Total Gate Charge VGS = 0 V to 10 V VDD = 13 V, ID = 14.9 A 15 27 nC Qg Total Gate Charge VGS = 0 V to 5 V 8 16 nC Qgs Gate to Source Charge 2.5 nC Qgd Gate to Drain “Miller” Charge 3.2 nC VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = 3.1 A (Note 2) 0.8 1.2 V VGS = 0 V, IS = 14.9 A (Note 2) 0.9 1.3 trr Reverse Recovery Time IF = 14.9 A, di/dt = 100 A/µs 14 26 ns Qrr Reverse Recovery Charge 4 10 nC Notes: 1: RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθJA is determined by the user’s board design. 2: Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%. 3: EAS of 12 mJ is based on starting TJ = 25 °C, L = 1 mH, IAS = 5 A, VDD = 23 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 12 A. 40 °C/W when mounted on a 1 in2 pad of 2 oz copper 96 °C/W when mounted on a minimum pad. a) b) |
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