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VC-707-ECE-KA Datasheet(PDF) 2 Page - Vectron International, Inc |
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VC-707-ECE-KA Datasheet(HTML) 2 Page - Vectron International, Inc |
2 / 7 page Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com Page2 Performance Specifications 1. The VC-707 power supply pin should be filtered, eg, a 0.1 and 0.01uf capacitor. 2. See Standard Frequencies and Ordering Information for more information. 3. Includes calibration tolerance, operating temperature, supply voltage variations,, aging and IR reflow. 4. Figure 2 defines these parameters and Figure 1 defines the test circuit. 5. Duty Cycle is defines as the On/Time Period. 6. Measured using an Agilent E5052, 155.520MHz. Please see “Typical Phase Noise and Jitter Report for the VC-706 series”. 7. Measured using a LeCroy 8600, 25K samples. 8. Outputs will be Enabled if Enable/Disable is left open. Table 1. Electrical Performance, LVPECL Option Parameter Symbol Min Typical Maximum Units Supply Voltage1 V DD 3.15 3.3 3.45 V Current (No Load) I DD 100 mA Frequency Nominal Frequency2 f N 270 800 MHz Stability2,3 (Ordering Options) ±20, ±25, ±32, ±50, ±100 ppm Outputs Output Logic Levels4, -10/70°C Output Logic High Output Logic Low V OH V OL V DD -1.025 V DD -1.810 V DD -0.880 V DD -1.620 V Output Logic Levels4, -40/85°C Output Logic High Output Logic Low V OH V OL V DD -1.085 V DD -1.830 V DD -0.880 V DD -1.555 V Output Rise and Fall Time4 Rise Time Fall Time t R /t F 600 600 ps ps Output Load 50 ohms to V DD -1.3V Duty Cycle5 45 50 55 % Jitter (12 kHz - 20 MHz BW)155.52MHz6 фJ 2 ps Period Jitter7 RMS P/P фJ 4 30 ps ps Enable/Disable Output Enabled8 Output Disabled V IH V IL 0.7*V DD 0.3*V DD V V Enable/Disable Leakage Current ±200 uA Start-Up Time t SU 10 ms Operating Temp. (Ordering Option) T OP -10/70 or -40/85 °C Package Size 5.0 x 7.0 x 1.8 or 5.08x7.5x2.2 mm t R t F V OH V OL 50% On Time Period Figure 2 1 2 3 6 5 4 -1.3V NC NC VDD -1.3V 50 50 Figure 1 |
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