M13S128324A_09 datasheet(7/50 Pages) ESMT

Part #	M13S128324A

Description	1M x 32 Bit x 4 Banks Double Data Rate SDRAM

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Manufacturer	ESMT [Elite Semiconductor Memory Technology Inc.]

Direct Link	http://www.esmt.com.tw/index.asp

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ESMT

M13S128324A

Elite Semiconductor Memory Technology Inc.

Publication Date : Jul. 2009

Revision : 2.3

7/50

AC Timing Parameter & Specifications - continued

-3.6

-4

-5

-6

Parameter

Symbol

Min

Max

Min

Max

Min

Max

Min

Max

Unit

Half Clock Period

tHP

tCLmin

or

tCHmin

-

tCLmin

or

tCHmin

-

tCLmin

or

tCHmin

-

tCLmin

or

tCHmin

-

ns

DQ-DQS output hold time

tQH

tHP-0.4

-

tHP-0.45

-

tHP-0.45

-

tHP-0.5

-

ns

ACTIVE to PRECHARGE

command

tRAS

11

120K

ns

10

120K

ns

8

120K

ns

7

120K

ns

tCK

Row Cycle Time

tRC

16

-

15

-

12

-

10

-

tCK

AUTO REFRESH Row Cycle Time

tRFC

18

-

17

-

14

-

12

-

tCK

ACTIVE to READ,WRITE delay

tRCD

5

-

5

-

4

-

3

-

tCK

PRECHARGE command period

tRP

4

-

4

-

4

-

3

-

tCK

ACTIVE to READ with

AUTOPRECHARGE command

tRAP

4

-

4

-

4

-

3

-

tCK

ACTIVE bank A to ACTIVE bank B

command

tRRD

3

-

3

-

2

-

2

-

tCK

Write recovery time

tWR

15

-

15

-

15

-

15

-

ns

Write data in to READ command

delay

tWTR

2

-

2

-

2

-

2

-

tCK

Col. Address to Col. Address delay

tCCD

1

-

1

-

1

-

1

-

tCK

Average periodic refresh interval

tREFI

-

7.8

-

7.8

-

7.8

-

7.8

us

Write preamble

tWPRE

0.25

-

0.25

-

0.25

-

0.25

-

tCK

Write postamble

tWPST

0.4

0.6

0.4

0.6

0.4

0.6

0.4

0.6

tCK

DQS read preamble

tRPRE

0.9

1.1

0.9

1.1

0.9

1.1

0.9

1.1

tCK

DQS read postamble

tRPST

0.4

0.6

0.4

0.6

0.4

0.6

0.4

0.6

tCK

Clock to DQS write preamble

setup time

tWPRES

0

-

0

-

0

-

0

-

ns

Load Mode Register / Extended

Mode register cycle time

tMRD

2

-

2

-

2

-

2

-

tCK

Exit self refresh to READ

command

tXSRD

200

-

200

-

200

-

200

-

tCK

Exit self refresh to non-READ

command

tXSNR

75

-

75

-

75

-

75

-

ns

Autoprecharge write

recovery+Precharge time

tDAL

(tWR/tCK)

+(tRP/tCK)

-

(tWR/tCK)

+(tRP/tCK)

-

(tWR/tCK)

+(tRP/tCK)

-

(tWR/tCK)

+(tRP/tCK)

-

tCK

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