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STM32W108CBU61 Datasheet(PDF) 26 Page - STMicroelectronics |
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STM32W108CBU61 Datasheet(HTML) 26 Page - STMicroelectronics |
26 / 179 page Pinout and pin description STM32W108CB, STM32W108HB 26/179 Doc ID 16252 Rev 2 34 29 PC3 I/O Digital I/O Either Enable with GPIO_DBGCFG[5], or enable Serial Wire mode (see JTMS description) JTDI I JTAG data in from debugger Selected when in JTAG mode (default mode, see JTMS description, Pin 35) Internal pull-up is enabled 35 30 PC4 I/O Digital I/O Enable with GPIO_DBGCFG[5] JTMS I JTAG mode select from debugger Selected when in JTAG mode (default mode) JTAG mode is enabled after power-up or by forcing NRST low Select Serial Wire mode using the ARM-defined protocol through a debugger Internal pull-up is enabled SWDIO I/O Serial Wire bidirectional data to/from debugger Enable Serial Wire mode (see JTMS description) Select Serial Wire mode using the ARM-defined protocol through a debugger Internal pull-up is enabled 36 PB0 I/O Digital I/O VREF Analog O ADC reference output. Enable analog function with GPIO_PBCFGL[3:0]. VREF Analog I ADC reference input. Enable analog function with GPIO_PBCFGL[3:0]. Enable reference output with an ST system function. IRQA I External interrupt source A. TRACECLK (see also Pin 25) O Synchronous CPU trace clock. Enable trace interface in ARM core. Select alternate output function with GPIO_PBCFGL[3:0]. TIM1CLK I Timer 1 external clock input. TIM2MSK I Timer 2 external clock mask input. 37 VDD_PADS Power Pads supply (2.1 to 3.6 V). Table 1. Pin descriptions (continued) 48-Pin Packag e Pin no. 40-Pin Packag e Pin no. Signal Direction Description |
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