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PA02 Datasheet(PDF) 2 Page - Cirrus Logic |
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PA02 Datasheet(HTML) 2 Page - Cirrus Logic |
2 / 5 page P r o d u c t I n n o v a t i o n F r o m PA02 • PA02A 2 PA02U absolutemaXimumratings SUPPLY VOLTAGE, +V S to –VS 38V OUTPUT CURRENT, within SOA 5A POWER DISSIPATION, internal1 48W INPUT VOLTAGE, differential ±30V INPUT VOLTAGE, common mode –V S+2V to +VS–2V TEMPERATURE, pin solder - 10s 300°C TEMPERATURE, junction1 150°C TEMPERATURE RANGE, storage –65 to +150°C OPERATING TEMPERATURE RANGE, case –55 to +125°C The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or subject to temperatures in excess of 850°C to avoid generating toxic fumes. caution speciFications PA02 PA02A PARAMETER TEST CONDITIONS 2, 6 MIN TYP MAX MIN TYP MAX UNITS INPUT OFFSET VOLTAGE, initial T C = 25°C ±5 ±10 ±1 ±3 mV OFFSET VOLTAGE, vs. temperature Full temperature range ±10 ±50 * ±25 µV/°C OFFSET VOLTAGE, vs. supply T C = 25°C ±10 * µV/V OFFSET VOLTAGE, vs. power T C = 25°C ±6 * µV/W BIAS CURRENT, initial T C = 25°C 50 200 25 100 pA BIAS CURRENT, vs. temperature T C = 85°C 200 * pA/°C BIAS CURRENT, vs. supply T C = 25°C .01 * pA/V OFFSET CURRENT, initial T C = 25°C 25 100 15 50 pA OFFSET CURRENT, vs. temperature T C = 85°C 100 * pA/°C INPUT IMPEDANCE, DC T C = 25°C 1000 * GΩ INPUT CAPACITANCE T C = 25°C 3 * pF COMMON MODE VOLT. RANGE5, Pos. Full temperature range +V S –6 +V S –3 * * V COMMON MODE VOLT. RANGE5, Neg. Full temperature range –V S +6 –V S +5 * * V COMMON MODE REJECTION, DC Full temperature range 70 100 * * dB GAIN OPEN LOOP GAIN at 10Hz T C = 25°C, 1kΩ load 103 * dB OPEN LOOP GAIN at 10Hz Full temp. range, 10kΩ load 86 100 * * dB GAIN BANDWIDTH PRODUCT at 1MHz T C = 25°C, 10Ω load 4.5 * MHz POWER BANDWIDTH T C = 25°C, 10Ω load 350 * kHz PHASE MARGIN Full temp. range, 10Ω load 30 * ° OUTPUT VOLTAGE SWING3 T C = 25°C, IO = 5A, RCL = .08Ω ±V S –4 ±V S –3 * * V VOLTAGE SWING3 Full temp. range, I O = 2A ±V S –2 ±V S –1.2 * * V CURRENT, peak T C = 25°C 5 * A SETTLING TIME to .1% T C = 25°C, 2V step .6 * µs SLEW RATE T C = 25°C 13 20 * * V/µs CAPACITIVE LOAD Full temp. range, A V > 10 SOA * HARMONIC DISTORTION P O = .5W, F = 1kHz, RL = 10Ω .004 * % SMALL SIGNAL rise/fall time R L = 10Ω, AV = 1 100 * ns SMALL SIGNAL overshoot R L = 10Ω, AV = 1 10 * % POWER SUPPLY VOLTAGE Full temperature range ±7 ±15 ±19 * * * V CURRENT, quiescent T C = 25°C 27 40 * * mA THERMAL RESISTANCE, AC junction to case4 F > 60Hz 1.9 2.1 * * °C/W RESISTANCE, DC junction to case F < 60Hz 2.4 2.6 * * °C/W RESISTANCE, junction to air 30 * °C/W TEMPERATURE RANGE, case Meets full range specifications –25 +85 –55 +125 °C NOTES: * The specification of PA02A is identical to the specification for PA02 in applicable column to the left. 1. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to achieve high MTTF. 2. The power supply voltage for all specifications is the TYP rating unless otherwise noted as a test condition. 3. +V S and –VS denote the positive and negative supply rail respectively. Total VS is measured from +VS to –VS. 4. Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz. 5. Exceeding CMV range can cause the output to latch. 6. Full temperature specifications are guaranteed but not 100% tested. 7. The absolute maximum negative input voltage is equal to the negative power supply voltage plus 1V (-Vs + 1V). |
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