10

Integrated Silicon Solution, Inc. — www.issi.com

Rev. C

03/21/2008

IS61C25616AL

IS61C25616AS

IS64C25616AL

IS64C25616AS

Notes:

1. The internal write time is defined by the overlap of

CE LOW and WE LOW. All signals must be in valid states to initiate a Write,

but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling

edge of the signal that terminates the Write.

2. I/O will assume the High-Z state if

OE

DATA UNDEFINED

LOW

VALID ADDRESS

HIGH-Z

ADDRESS

CE

UB, LB

WE

OE

UB_CEWR2.eps

DATA UNDEFINED

VALID ADDRESS

LOW

LOW

HIGH-Z

ADDRESS

CE

UB, LB

WE

OE

UB_CEWR3.eps