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ADS8556 Datasheet(PDF) 7 Page - Texas Instruments |
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ADS8556 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 40 page ELECTRICAL CHARACTERISTICS: GENERAL ADS8556 ADS8557 ADS8558 www.ti.com ............................................................................................................................................... SBAS404A – OCTOBER 2006 – REVISED AUGUST 2009 Over recommended operating free-air temperature range of –40°C to +125°C, AVDD = 4.5V to 5.5V, BVDD = 2.7V to 5.5V, HVDD = 10V to 15V, HVSS = –15V to –10V, VREF = 2.5V (internal), and fDATA = maximum, unless otherwise noted. ADS8556, ADS8557, ADS8558 PARAMETER CONDITIONS MIN TYP(1) MAX UNIT ANALOG INPUT RANGE pin/RANGE bit = 0 –4 × VREF +4 × VREF V Bipolar full-scale range CHXX RANGE pin/RANGE bit = 1 –2 × VREF +2 × VREF V Input range = ±4 × VREF 10 pF Input capacitance Input range = ±2 × VREF 20 pF Input leakage current No ongoing conversion ±1 µA Aperture delay 5 ns Aperture delay matching Common CONVST for all channels 250 ps Aperture jitter 50 ps EXTERNAL CLOCK INPUT (XCLK) External clock frequency fXCLK An external reference must be used for fXCLK > fCCLK 1 18 20 MHz External clock duty cycle 45 55 % REFERENCE VOLTAGE OUTPUT (REFOUT) 2.5V operation, REFDAC = 0x3FF 2.485 2.5 2.515 V 2.5V operation, REFDAC = 0x3FF at +25°C 2.496 2.5 2.504 V Reference voltage VREF 3.0V operation, REFDAC = 0x3FF 2.985 3.0 3.015 V 3.0V operation, REFDAC = 0x3FF at +25°C 2.995 3.0 3.005 V Reference voltage drift dVREF/dT ±10 ppm/°C Power-supply rejection ratio PSRR 73 dB Output current IREFOUT DC current –2 2 mA Short-circuit current(2) IREFSC 50 mA Turn-on settling time tREFON 10 ms At CREF_x pins 4.7 10 µF External load capacitance At REFIO pins 100 470 nF Tuning range REFDAC Internal reference output voltage range 0.2 × VREF VREF V REFDAC resolution 10 Bits REFDAC differential nonlinearity DNLDAC –1 ±0.1 1 LSB REFDAC integral nonlinearity INLDAC –2 ±0.1 2 LSB REFDAC offset error VOSDAC VREF = 0.5V (DAC = 0x0CC) –4 ±0.65 4 LSB REFERENCE VOLTAGE INPUT (REFIN) Reference input voltage VREFIN 0.5 2.5 3.025 V Input resistance 100 M Ω Input capacitance 5 pF Reference input current 1 µA SERIAL CLOCK INPUT (SCLK) Serial clock input frequency fSCLK 0.1 36 MHz Serial clock period tSCLK 0.0278 10 µs Serial clock duty cycle 40 60 % DIGITAL INPUTS(3) Logic family CMOS with Schmitt-Trigger High-level input voltage 0.7 × BVDD BVDD + 0.3 V Low-level input voltage BGND – 0.3 0.3 × BVDD V Input current VI = BVDD to BGND –50 +50 nA Input capacitance 5 pF (1) All values are at TA = +25°C. (2) Reference output current is not limited internally. (3) Specified by design. Copyright © 2006–2009, Texas Instruments Incorporated 7 Product Folder Link(s): ADS8556 ADS8557 ADS8558 |
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