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BQ24312DSGT Datasheet(PDF) 11 Page - Texas Instruments |
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BQ24312DSGT Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 21 page  OPERATION Input Overvoltage Protection Input Overcurrent Protection Battery Overvoltage Protection Thermal Protection Enable Function bq24312 www.ti.com................................................................................................................................................................................................. SLUS912 – AUGUST 2009 The device continuously monitors the input voltage, the input current, and the battery voltage as described in detail in the following sections. As long as the input voltage is less than VO(REG), the output voltage tracks the input voltage (less the drop caused by RDSON of Q1). If the input voltage is greater than VO(REG) (plus the RDSON drop) and less than VOVP, the device acts like a series linear regulator, with the output voltage regulated to VO(REG). If the input voltage rises above VOVP, the output voltage is clamped to VO(REG) for a blanking duration tBLANK(OVP). If the input voltage returns below VOVP within tBLANK(OVP), the device continues normal operation (See Figure 4). This provides protection against turning power off due to transient overvoltage spikes while still protecting the system. However, if the input voltage remains above VOVP for more than tBLANK(OVP), the internal FET is turned off, removing power from the circuit (see Figure 5). When the input voltage comes back to a safe value the device waits for tON(OVP), then switches on Q1 and goes through the soft-start routine (see Figure 6). The overcurrent threshold is programmed by a resistor RILIM connected from the ILIM pin to VSS. Figure 15 shows the OCP threshold as a function of RILIM, and may be approximated by the following equation: IOCP = 25 ÷ RILIM (current in A, resistance in kΩ), where RILIM must be between 15 kΩ and 90 kΩ. If the load current tries to exceed the IOCP threshold, the device limits the current for a blanking duration of tBLANK(OCP). If the load current returns to less than IOCP before tBLANK(OCP) times out, the device continues to operate. However, if the overcurrent situation persists for tBLANK(OCP), the FET Q1 is turned off for a duration of tREC(OCP), and the FAULT pin is driven low. The FET is then turned on again after tREC(OCP) and the current is monitored all over again. Each time an OCP fault occurs, an internal counter is incremented. If 15 OCP faults occur in one charge cycle, the FET is turned off permanently. The counter is cleared either by removing and re-applying input power, or by disabling and re-enabling the device with the CE pin. Figure 7 to Figure 9 show what happens in an overcurrent fault. To prevent the input voltage from spiking up due to the inductance of the input cable, Q1 is turned off slowly, resulting in a “soft-stop”, as shown in Figure 9. The battery overvoltage threshold BVOVP is internally set to 4.35V. If the battery voltage exceeds the BVOVP threshold, the FET Q1 is turned off, and the FAULT pin is driven low. The FET is turned back on once the battery voltage drops to BVOVP – Vhys(Bovp) (see Figure 10 and Figure 11). Each time a battery overvoltage fault occurs, an internal counter is incremented. If 15 such faults occur in one charge cycle, the FET is turned off permanently. The counter is cleared either by removing and re-applying input power, or by disabling and re-enabling the device with the CE pin. In the case of a battery overvoltage fault, Q1 is switched OFF gradually (see Figure 10). If the junction temperature of the device exceeds TJ(OFF), the FET Q1 is turned off, and the FAULT pin is driven low. The FET is turned back on when the junction temperature falls below TJ(OFF) – TJ(OFF-HYS). The IC has an enable pin which can be used to enable or disable the device. When the CE pin is driven high, the internal FET is turned off. When the CE pin is low, the FET is turned on if other conditions are safe. The OCP counter and the Bat-OVP counter are both reset when the device is disabled and re-enabled. The CE pin has an internal pulldown resistor and can be left floating. Note that the FAULT pin functionality is also disabled when the CE pin is high. Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s): bq24312 |
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