DS-CPC5710-R02

www.clare.com

1

Features

•

Excellent common-mode rejection ratio (CMRR)

•

Application circuits can meet isolation requirements

of worldwide telephony standards

•

Small 8-pin SOIC

•

Worldwide telephone network compatibility

•

Full-wave ringing level detector comparator with

internal threshold, large hysteresis, and logic-level

output

•

3.3V or 5V operation

•

High differential input impedance

•

Very low common-mode input impedance

•

Fixed gain

•

Differential or single-ended linear output

•

TTL logic level input

•

CMOS logic level output (TTL compatible)

•

Virtually non-detectable in voice monitoring

applications

Applications

•

The CPC5710N can be used for line monitoring or

detection of signaling states and loop conditions

such as:

• Display feature (caller ID) signal buffering

• Line-In-Use (LIU) detection

• Ringing signal with adjustable detection level

• Battery presence monitoring

• Tip to ring line voltage monitoring

• Line polarity

• Imperceptible voice recording

Description

The Clare CPC5710N is a selectable dual function

CMOS special purpose integrated high-impedance

input, fixed-gain amplifier and an internally set voltage

level comparator for telephone line monitoring. The

high (>40dB) common-mode rejection ratio makes the

CPC5710N an excellent choice for signaling detection,

line condition monitoring, discrete voice recording and

CID buffering applications. In addition to voice

applications, the CPC5710N is ideal for data

applications such as embedded modem designs

utilized in broadband set-top boxes.

Ordering Information

Figure 1. CPC5710N Block Diagram

Part Number

Description

CPC5710N

PLM IC, Tubed, 100/Tube

CPC5710NTR

PLM IC, Tape &Reel, 2000/Reel

Switch shown

in Detector Mode

IN+

IN-

LIN/CMP

CMPOUT

LINOUT+

LINOUT-

+

+

-

-

-

+

1.625 V

1.25 V

2V

0V

A=6

V

3

6

7

1

2

5

4

GND

8

GND

+

-

+

-

50k

Ω

RoHS

2002/95/EC

Pb

CPC5710N

Phone Line Monitor (PLM) IC